# AVR: Timer overflow flag in TIFR [duplicate]

I have a little question about the TOVn flag located in the TIFRn register.

The datasheet says, if the TCNTn counter overflows, then the TOVn flag located in the register TIFRn will be set to 1. (at the same clock cycle the overflow occoured).

The code to handle such event is the following:

/* Check if TOV1 flag is set */
if (TIFR1 & _BV(TOV1)) {
/* Since TOV1 is set, we know we missed an overflow interrupt */

/* Handle the event... */
// ... timer_ovf_cnt++;

/* Prevent ISR to be called, because we already handled the overflow */
TIFR1 = _BV(TOV1); // .. but TOV1 is already set in TIFR1?
}


But what confuses me is: why should I set the TOV1 bit when its already set by hardware? Does setting the TOV1 flag in TIFR1 to 1 by user hand disable the timer interrupt? (Even, if the TOV1 flag is already set by hardware?)

EDIT: Found the answer: Clearing flag bits by writing 1?