So I know that propagation delay and timing inside an ASIC are affected by temperature. In the old days things went faster when colder and slower when hotter. Now at 90nm and below there is temperature inversion so things get faster as they get hotter and slower when colder.

If I have a 65nm chip that has a timing problem at high temperature am I looking for a setup or a hold violation? Or could it be either because it's really just the prop delay that's affected? An explanation of how/why would be appreciated.

I've done some searching, read some articles, (tried to remember what I learned last time this was an issue) but it's still not really clear to me.

  • \$\begingroup\$ Can you be more specific than "has a timing problem"? \$\endgroup\$ – Dave Tweed Feb 6 '15 at 22:55
  • \$\begingroup\$ Sorry not yet I just got the report that the chip was failing when it was warm (still within operating limits), and that cooling with some airflow made it pass. Soon I'll get some of them and be able to investigate more but I was just trying to do my homework ahead of time. It reminds me of timing issues I've tracked down in the past. \$\endgroup\$ – confused Feb 7 '15 at 1:13
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    \$\begingroup\$ When RTL design fails as delay decreases, hold time would be a leading suspect. Hold time = Min output delay + Min propagation delay - Max clock skew. So when the two delays decrease, hold time also decrease. \$\endgroup\$ – rioraxe Feb 8 '15 at 20:48

The 'temperature inversion' you are talking about is not happening at 90nm as far as I know. However if you operate a circuit in subthreshold you will see that effect.

If you know it is either a setup or hold failure then to distinguish between a setup and hold failure the easisest way is probably to reduce the clock frequency.

If the error corrects itself at a low frequency then it is probably a setup failure. If however the error is impossible to correct it was a hold failure.

Note that reducing the clock frequency reduces self-heating, so you might have to tune up the ambient temperature a little bit.


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