A three-input gate which outputs true when exactly one of its inputs is true may be used as a two-input NOR gate by tying one of its inputs high; it may also be used as an "A and not B" input by tying one input to the desired "A" and two to the desired "B", or as a two-input exclusive-or gate by tying one input low. Such two-input gates may be combined to produce any other kind of logic.
Using such a three-input gate purely to implement the above two-input functions may seem wasteful, but in reality I'm unaware of anyone actually mass-producing chips to compute true-only-if-exactly-one-input-is-true functions; since such gates only exist in simulation, there's no practical need to avoid including excess gates as there would be if one were building actual circuits.
PS--I would draw the above gate in a schematic as a trapezoid, with each inputs on the long side labeled "+1", and the output on the short side labeled "total == 1". Such a labeling scheme would allow a variety of devices, including "total = 2", or "total < 2",
total > 1, or even
total = 1..2, to be notated in clearly-understandable and consistent fashion. Additionally, such a device could easily accommodate various weightings of inputs, and one set of inputs could be used to derive multiple outputs.
For example, consider the following device [pretend it's a trapezoid]
---| +16 `---.
---| +8 total>=10 |---
---| +4 |
---| +2 total>=9 |---
---| +1 _____,---'
The meaning of such devices in a BCD carry-propagation chain would likely be clearer than the appropriate combination of gates [the two outputs would be "+16 OR (+8 AND (+4 OR +2))", and "+16 OR (+8 AND (+4 OR +2 OR +1))`].