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I am finding it difficult to understand how transistors which are transconductors can be used to design an Opamp which is a voltage amplifier. Silly question but has really been heavy on me. Thanks.

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  • \$\begingroup\$ What research have you done so far? Full schematics are available for some of the original op-amp designs. \$\endgroup\$
    – pjc50
    Feb 13, 2015 at 13:55
  • \$\begingroup\$ I just don't get it when people say they want a low output impedance when it should be a high impedance that we need as it is a transconductance amplifier. Thanks. \$\endgroup\$
    – salil87
    Feb 13, 2015 at 14:02
  • \$\begingroup\$ But you can use an output stage consisting (simplest case) of a common collector (or common drain) configuration. Both have small output resistances. \$\endgroup\$
    – LvW
    Feb 13, 2015 at 14:13

3 Answers 3

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I am finding it difficult to understand how transistors which are transconductors can be used to design an Opamp which is a voltage amplifier.

An op-amp is a voltage amplifier when negative feedback is applied.

If you had a perfect and theoretical high gain voltage controlled current source and applied negative feedback from output to input then it would become a voltage controlled voltage source.

An op-amp's output needn't be a common collector push pull circuit. Many op-amps these days use a common emitter/source configuration and the open-loop output impedance can be quite high dynamically. It is negative feedback that dictates largely what the output impedance looks like.

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Your average op amp might look something like this:

schematic

simulate this circuit – Schematic created using CircuitLab

That's a very basic two stage op amp: the first stage is built with M1-2-3-4 and is a differential stage, while the second stage is built with M5 and is a sort of common source stage. M6-7-8 just bias the whole thing.

Looking at M3-M4 you can see they form a current mirror, M7 dictates the total current and \$V_{i1}\$, \$V_{i2}\$ produce an unbalancing in the two branches: when \$V_{i1}\$ is higher \$v_{gs1}\$ is lower, \$i_{d1}\$ is lower and it equals \$i_{d4}\$, but from M2 you have some increased drain current. So basically you have more current coming from M2, less flowing in M4, where is the difference going? Not in M5 gate for sure, it flows in the mirror output resistance, that is very high, thus producing a very high increase in the gate voltage of M5. \$i_{d5}\$ would increase but M6 is part of a mirror and he's not willing to let the current increase. Again, this extra current flows in the mirror output resistance thus producing a very high voltage swing on \$v_{out}\$. Please note that the total gain is thus something like (Very High)\$^2\$.

All true analog design engineers, please forgive me.

some notes

In the "analysis" made I've assumed all drain currents positive, that's true only using the "common sense" drain current convention, i.e. positive current flows from top to bottom. Please note that this schematic is very very basic, you'd at least need an RC series from output node to M5 gate to compensate, plus the bias part is omitted of course.

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  • \$\begingroup\$ Thanks Vladimir. I understood the circuit. But I see the circuit as a VCCS with a high o/p resistance not a VCVS with a low o/p resistance which an opamp is normally portrayed. Where am I going wrong? \$\endgroup\$
    – salil87
    Feb 13, 2015 at 14:24
  • \$\begingroup\$ Well that's quite a different question I'd say... Normally you don't care much about the output resistance though, speed is more important. \$\endgroup\$ Feb 13, 2015 at 14:26
  • \$\begingroup\$ Still a bit confused. So it is actually VCCS but we use it as VCVS? \$\endgroup\$
    – salil87
    Feb 13, 2015 at 14:52
  • \$\begingroup\$ I think your question is nice as is, what you are asking now is quite different. I suggest you to ask another question, answering in the comments is quite a pain. \$\endgroup\$ Feb 13, 2015 at 14:54
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    \$\begingroup\$ Without feedback you have near-infinite gain, remember, so the output will be close to one of the rails and the output resistance will be the Rdson of one of the output FETs. (Note that BJTs are transconductance/CCCS but FETs are voltage-controlled devices). \$\endgroup\$
    – pjc50
    Feb 13, 2015 at 15:21
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This image from http://www.ibiblio.org/kuphaldt/electricCircuits/Semi/SEMI_8.html#03322.png might be better:

Discrete transistor simple opamp

The central construction is a current mirror. At equilibrium, equal currents must flow in Q1/Q3 and Q2/Q4. Changing the voltage at the output will cause a current to flow in or out of it; this imbalance will be corrected by an increase or decrease in current flow through Q2. Hence low output impedance, because large variations in current draw at the output cause a small variation in voltage. If it had a large output impedance, then varying current draw would be able to force the output voltage up and down more.

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