I am curious how to determine what voltage is acceptable to connect to a micro-controller through a resistor.

From the data sheet the highest voltage on a GPIO is 3.8V.

So If I have 5 Volts going through a.... lets say 1M resistor to the 3.3V input pin is this ok?

Clearly there is a internal resistor and some voltage drop will occur, but the datasheet does not seem to come out and say it.

I haven't found the internal resistor for the micro-controller so I am curious if I am looking for the correct value...

I am using the CC3200 from TI

  • \$\begingroup\$ The 3.3V input pin is not a GPIO pin. \$\endgroup\$ – Majenko Feb 25 '15 at 0:30
  • \$\begingroup\$ I meant a input GPIO pin not the power pin \$\endgroup\$ – tman Feb 25 '15 at 0:31
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    \$\begingroup\$ Does the datasheet mention a maximum over-voltage current on the input pin? \$\endgroup\$ – Majenko Feb 25 '15 at 0:35
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    \$\begingroup\$ In the real world, it will probably be OK. Most likely the GPIO pin has a diode from input to VCC. This diode will forward bias, but the 1M resistor will limit the current so that it will not hurt anything. Sometimes datasheets specify maximum current to cover this kind of situation. If you need to be sure whether it is OK, ask TI. Or, you can devise some way to avoid the situation. \$\endgroup\$ – mkeith Feb 25 '15 at 0:38
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    \$\begingroup\$ You're much better off using two resistors to explicitly create a voltage divider than to depend on the internal characteristics of the chip's input circuitry. \$\endgroup\$ – DoxyLover Feb 25 '15 at 1:36

From the data sheet the highest voltage on a GPIO is 3.8V.

So If I have 5 Volts going through a.... lets say 1M resistor to the 3.3V input pin is this ok?

The datasheet DOES explicitly cover the situation by stating an absolute maximum voltage. Above that voltage damage MAY occur.

If the IC is operating mis-operation may occur. Or may not.

Not every "might happen" can be covered or identified.
While 1 megOhm will usually be safe there are no guarantees.

Contrived but possible example:
An internal diode structure is reverse biased
and a usually inaccessible node is trickled up at a few uA
until an internal parasitic SCR structure is triggered.
This latches on and shorts VCC into some_place-it_ought_not_be
and destroys the IC.

Can happen. Has happened. Can never be sure.
Modern IC designs specifically try to avoid the creation of parasitic SCRs that traditionally caused IC latchup and destruction. Murphy can still outsmart them on occasion.

  • \$\begingroup\$ I agree, EXCEPT, I would simply ask TI if it is OK. They may know, and may answer. Then again, if you are a low production run customer, maybe they won't care enough to give you the time of day. \$\endgroup\$ – mkeith Feb 25 '15 at 5:43
  • \$\begingroup\$ Consider a 5V trace running near a GPIO pin that is pulled low... How close can I get this trace to the GPIO pin?..,This sparked my interest in the question...I just wanted to make sure there was not some other name that was not obvious to me. \$\endgroup\$ – tman Feb 25 '15 at 12:02
  • \$\begingroup\$ @mkeith For TI to know the answer they would need to know the question :-). ie the standard conditions are well defined and are designed to stop parasitic diodes etc conducting. Once this starts the chip can have many possible undesigned features activated. As these occur across devices which exist by accident, characterising all possible ones is an immense task. It's easier to protect inputs so they never go into illegal states than to determine what happens if you do. \$\endgroup\$ – Russell McMahon Feb 25 '15 at 15:45
  • \$\begingroup\$ @tman Trace to pin clearances with both at low voltage will be set by PCB design-rule rules which are set to guarantee that fabrication is reliable. At low voltages and in normal situations these clearances will be adequate to eliminate secondary effects. Abnormal situations may be high humidity or board contamination or eg RF or very high impedance circuits. Things like "guard rings" may be needed when normal adjacent signals affect ultra sensitive or very high Z circuits. \$\endgroup\$ – Russell McMahon Feb 25 '15 at 15:49
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    \$\begingroup\$ Yes, the boards I design run several hundred K per year. One popular product may have hit 1 million per year. I agree that eliminating a transistor only makes sense in that context. Yes, SOT-23 BJT costs around 0.75 cents. My company has a good relationship with TI, and normally they reply to specific technical questions without any problem. I do not know how they treat hobbyists and low volume customers. 15 years ago, TI, national, linear, maxim all provided decent support for all comers. Not sure nowadays. \$\endgroup\$ – mkeith Feb 26 '15 at 3:39

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