# What would be the simpliest buffer amplifier design in this situation?

Take a look at this schematic:

It is important to assume that we have the following constrains:

1) Load is connected to ground, therefore it requires a positive potential to activate

2) The voltage potential to the load is at 5V regulated supplied lets say by a voltage regulator L7805CV that can supply the appropriate current (i know the load on the schematic is 380 omhs but please don't mind that)

3) Signal comes from an external low current 5V source, and we want logic 0v=off 5v=on

For this logic normally an N-channel mosfet would do the job but since the load would have to be connected to its source the mosfet will not fully saturate therefore the voltage going to the load will be a lot less than 5V.

Using a p-channel mosfet is ideal the way the load is connected but the logic will be inverted. So the simplest thing in my mind is to basically invert the input to its gate. But how do i do that with minimal components/lowest cost/simplicity?

Also is there a better way to do this than what i am thinking?

edit: In addition, is there any way i could employ a specific N-channel mosfet as my main buffer into my design while keeping the same constrains? i.e. Allow the mosfet to fully activate keeping the load connected to its source?

Kind regards!

A simple way is to add an nmos or transistor driver to the PMOS. It would look something like this:

simulate this circuit – Schematic created using CircuitLab

If you want to use a bjt rather than a mosfet just add a resistor to from the signal to drive it:

Adjust R2 to increase or decrease speed the PMOS turns on or off.

This will gives you more topologies for inverters.

• Thanks for the reply. This explains it really well. However is there any way i could employ a specific N-channel mosfet as my main buffer into my design while keeping the same constrains? i.e. Eliminate the voltage drop i would have to the load because it is connected to its source, while still Vd=Vg=5V?
– TnF
Mar 2, 2015 at 5:52
• You could use a low-side switch instead of high-side. Mar 2, 2015 at 5:57
• @TnF Yup, as photon said, you have to put the load above the source as discussed in the previous post if you want to use the NMOS rather than a PMOS. The only other solution to this is to either have a higher voltage rail so that you can bring the gate voltage to Vdd+Vt or some circuits actually use voltage doublers to get that higher voltage, but that's a lot more complicated route. The main reason you'd want to go that route is to take advantage of the near 2X current rating's NMOS has over PMOS. I doubt you'd want to get so complicated so soon though. Mar 2, 2015 at 14:32
• @horta That's exactly what i wanted to hear because i'm thinking if i could double purpose a circuit design by changing what you put into its inputs and outputs to take advantage of the existing components...I understand it can happen but yes it will be more complicated. Also thanks for the speed adjustment, that will be causing some delay and is important to me.
– TnF
Mar 2, 2015 at 14:53
• @TnF I think what you're after is something like this: electronics.stackexchange.com/questions/113397/… and this: en.wikipedia.org/wiki/Bootstrapping_%28electronics%29 Mar 2, 2015 at 15:12

You can use a single-bit inverting buffer like 74AHC1G04. You could also use a single transistor and resistor. But the 1-gate inverter is probably just as small (SC70 package), just as cheap (below \$0.10 in volume), and less hassle to design.