I'm trying to figure out if there's any way to affordably improve the performance of an analog pin driver that needs to be periodically isolated from its load, for the duration of self-calibration. The circuit, as it currently stands, is as below, but I'd like to - if possible to do so cheaply - to remove the effects of SW1's resistance on the DC performance.
The circuit is a +/-10V pin driver for an analog output that has to interface with "typical" DAQ cards. They usually offer high DC impedance. Some of those cards are dynamically nasty: they have multiplexer inputs with their fast (10s of nanoseconds) charge injections. It needs to maintain about 15 bits of accuracy across time and temperature (1 part in 30,000). Thus it self-calibrates using an ADC and a stable reference. The bandwidth is about 1kHz.
The loads are assumed to be high-impedance, with a dynamic component. Unfortunately, every once in a while someone will "happily" attach a voltage divider or some other circuit with sufficiently low DC impedance to kill the accuracy of the output voltage with SW1 present. I like making life easier for my customers, and was wondering if this deficiency could be cheaply removed.
There are 10 channels, so per-channel cost is under scrutiny as well.
C2 stores some charge to ease U1's job in presence of dynamic loads. R2 stabilizes the op-amp in presence of the capacitive load. U1 is a 15MHz GBW rail-to-rail output part, running at a gain of 4, with 2V of headroom between output and supplies - it's fed +/-12V. I didn't show the rest of the circuit attached to the inverting input, it's just a 2nd order MFB filter.
R1 closes the DC feedback around R2, taking out its effect on DC performance.
For in-circuit calibration and removal of gain and offset errors, SW1 is opened, SW2 closes, and an A/D converter is attached to the output.
For this circuit has to be affordable, SW1 is a DG411 or similar, with about 30 Ohms of on resistance. It'd be very nice if that resistance could be used in place of R2, and placed inside of the feedback loop.
Conceptually, I'd like something as follows:
For calibration, SW1 opens, so that a misbehaving load won't skew the calibration, SW2 closes and SW3 flips. The voltage follower U2 is necessary to prevent SW3's R_ON from influencing the gain of the circuit. Its closed-loop output resistance needs to be under 1 Ohm, worst case.
I'm really interested if it's possible to turn things around to avoid that U2 buffer - it would add about a $1.50 per channel. U1 would also "see" the nasty dynamic disturbances directly on its input. This worsens the settling time from dynamic disturbances on the output.
One solution would be to retain R1 and use very low R_ON discrete mosfets for SW1. This is problematic - most cheap and small mosfets require large gate-source voltage (5V) to maintain low resistance. Realistically I'd use two N-channel devices back to-back. The analog part of the circuit is isolated from the CPU, so I can't use cheap voltage multiplier tricks on a CPU output pin to steer those switches. The switch control signals are threaded through the GPIO outputs on the calibration ADC (this probably spills the beans on what chip I use for the ADC).
I was wondering if there is a discrete solution that would be stable enough to work, but I can't see any. Since R1 is on the order of 40k, I can't see a simple emitter follower at work here - there's just not enough current to keep the output resistance into R1 down to the required 1 Ohm. Is there some field-effect or BJT discrete magic that could be done here in place of a full-blown op-amp U2?