# Generating 12V PWM from 5V PWM

I am generating a 5V PWM signal from my MCU (an Atmel ATMEGA1284P). I need to convert this to a 12V PWM signal. For this I designed the circuit below, something very similar to a Sziklai pair, but adapted to match this case. It uses a bipolar NPN transistor to drive a bipolar PNP transistor. Ideally, I would need V_LOAD to be a 12.0 V PWM.

I ran a few simulations and this seemed to fulfill the purpose really well, until I remembered C_LOAD. Since V_LOAD is not actively pulled down when CLK2 goes low, the fall time is very long (too long, about 25 μs).

Any ideas on how to improve my design? Or should I trash this and use something else?

Some clarifications: The maximal current I'm going to drive will be around 10 mA. I have some pretty harsh specifications to fulfill: V_LOAD should be 12.0V and the rise and fall times (10%-90% = 1.2V-10.8V) should maximally be 2 μs,

EDIT: Thanks for your answers. Here's what I ended up using: Simulation.

It's based on Majenko's answer with two transistors added as gate drivers to reduce the time it takes for the PWM to go LO. Furthermore, MOSFET's with low gate capacitance have been chosen (BSS84P and BSS138). The fall time then becomes 3 μs.

• Why not actively pull it down? Mar 9, 2015 at 0:09
• In place of Q1 use a pair of emitter followers in series - emitters commoned to load. Bases commoned to Q2C. Remove R3. R4 maybe 1k (10k may be OK). High side EF = NPN, collector to V12. Low side EF = PNP, collector to ground.This will drive at about speed of Q2C - maybe sub uS. Can be made faster. I use my std [super]-"jellybean"transistors BC337-40, 327-40 or SMD 817-40, 807-40. Mar 9, 2015 at 0:19

What @IgnacioVacquez-Abrams is talking about in his comment is creating a Push-Pull output. This is basically what is in the output stage of your Microcontroller.

simulate this circuit – Schematic created using CircuitLab

When the PWM is HIGH Q1 conducts. The gates of M1 and M2 are then both LOW, so M1 is on and M2 is off. RL and CL are effectively connected to +12V. When the PWM goes low Q1 stops conducting, the gates of M1 and M2 are pulled up to +12V by R1. M1 turns off, M2 turns on. RL and CL are then effectively connected to ground.

It is important to select MOSFETs M1 & M2 with gate threshold voltages sufficiently high so that both FETs are not ON when the gate voltage is in-between 12V & 0V. This is one place where you do NOT want to use logic-level MOSFETs.

• And why do you make that statement? Care to elaborate? Mar 9, 2015 at 1:04
• @DwayneReid or are you just one of those people who are naturally prejudiced against all the answers that aren't yours? Mar 9, 2015 at 1:24
• Thank you! I simulated your suggestion (link) and it seems to be exactly what I need. I'll test it a bit more tomorrow and will come back. Mar 9, 2015 at 1:54
• @Majenko: Sorry - no. In fact, I usually go in and edit answers so that they do work. But there was too much wrong with your schematic and I didn't have time. Thus my warning. Mar 9, 2015 at 4:08
• Two issues. 1) Combination or R1 & R2 ensures that both M1 & M2 are always conducting whenever Q1 is turned ON. 2) If R2 was not there, there is still significant shoot-through current during the switching transitions. You can get away with that if the ON-resistance of M1 & M2 is sufficiently high to limit the peak current but it's bad practice to do things that way. Mar 9, 2015 at 4:10

How much current do you need?

There are two easy ways to do this with simple components. One method is good for only a few mA current - enough to feed the input of something active like a VFD. The other method is good for as much current as you want to make it for.

I'll show the higher-current option first.

simulate this circuit – Schematic created using CircuitLab

The above circuit works very well and is good for medium-speed PWM (DC to tens of KHz). It can be beefed up substantially if needed but more components will be required.

Note that this first circuit inverts the logic signal: a HI on the input gives you a LO on the output.

This next circuit is just a level-shifter. It has the advantage of very low cost but it's only good for a few mA.

simulate this circuit

This circuit functions like a common-base amplifier. The base is held at +5V when the input is HI (also +5V) and the transistor is OFF. This allows the collector to float up to the +12V rail.

When the input goes LO, the transistor turns on hard and pulls the collector to just above the logic LO level of the input. Note that all of the sinking output current goes through the input pin.

This circuit is non-inverting: a logic HI on the input gives you a logic HI on the output. This also works well - it's what I use to interface some of my stuff to VFDs that require an input signal higher than 5V.

• First of all, thank you. I tried your first suggestion and simulated it here: link However I couldn't see what was pulling the output voltage down to 11.2V at HI. I would need a PWM at 12.0V. Mar 9, 2015 at 1:50
• Thanks for the simple circuits! Do you know whether the second level shifter is safe for Arduino, given that it will expose an output pin to 12 V? Jul 26, 2018 at 5:00
• The 2nd circuit is absolutely safe for Arduino. I use it with PIC circuits at both 5V & 3.3V rails. Just ensure that the voltage level on the base resistor is the same as the supply rail that the microcontroller is operating from. Jul 27, 2018 at 1:39