According to Section 2.5.2 of the datasheet (page 32), HFINTOSC is enabled when:
• SCS1 = 1 and IRCF<2:0> 000
• SCS1 = 1 and IRCF<2:0> = 000 and INTSRC = 1
• IESO bit of CONFIG1H = 1 enabling Two-Speed Start-up.
• FCMEM bit of CONFIG1H = 1 enabling Two-Speed Start-up and Fail-Safe mode.
• FOSC<3:0> of CONFIG1H selects the internal oscillator as the primary clock
The HF Internal Oscillator (IOFS) bit of the OSCCON register indicates whether the HFINTOSC is stable or not
I'm not clear on why SCS1 =1 and IRCF<2:0> is listed twice.
#pragma config FOSC = INTIO67 // Internal Oscilaor RA6 RA7 ports
#pragma config WDTEN = OFF // Watchdog Timeer disabled
#pragma config HFOFST = ON // HFINTOSC Fast Start-up:
#pragma config PWRT = OFF // Power-up Timer Enable bit: OFF
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit:
#pragma config IESO = ON // Internal/External Oscillator Switchover
#pragma config SCS1 = 1 // select internal oscillator as system clock
#pragma config IRCF = 0 // 31 kHz device clock derived directly from LFINTOSC
OSCCON=0xf3; // Internal Oscillator Hi
while(HFOFST==0); // wait for HFINTOSC to be stable
So I've add a couple of additional pragmas based on the instructions in Section 2.5.2. I also changed the first line of main to set OSCCON to 0xf3 instead of 0xf7, so it does overwrite the HFOFST bit. It then waits for that bit to become clear before doing anything else.
I think the setting of SCS1 may be the issue. It defaults to 0 and the instructions above say it should be 1.