I'm laying out a PCB for a project that has an HD-SDI input, which uses a 1.5GHz signal. I'm new to high-frequency considerations, so I'm struggling with a few concepts. Here is the schematic and layout of the area near the SDI input, which is based entirely off the recommended design of the chip I'm using. J2 is a 75\$\Omega\$ MMCX through-hole jack and the chip on the right is the Semtech GS2961A (SDI-to-parallel converter).
Red: Top layer
Blue: Ground layer and bottom layer
For reasons, I put the MMCX jack and the components on the same side of the board. Since the jack is through-hole, the SDI signal enters the board on the bottom layer and comes up to the top layer in a via (located to the left of R1). In order for the via to have the necessary 75\$\Omega\$ impedance, I had to make a large anti-pad around the via. Similarly, the width of the trace carrying the SDI signal is such that it also has a 75\$\Omega\$ impedance. So far so good.
The part that concerns me is how the anti-pad around the via affects the impedance of the trace as it approaches the via. Since the trace impedance is a function of its distance from its reference plane, what happens when that reference suddenly vanishes? Is there a sudden impedance spike that will cause reflections or is the effect negligible?
Also, should the ground plane be removed underneath the resistors (R1, R2, and R3) forming the termination circuit?