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I'm designing circuitry that uses an NXP 74HC4051 analog mux with a +8V supply. An MCU with 3.3V GPIOs needs to control the mux S0-S2 selection inputs. I am wondering whether an NXP 74LVC07A, powered by the +3.3V supply and having open-drain outputs, can be safely used as the level translator. Following are my proposed schematic, and excerpts from the NXP 'HC4051 data sheet and the 'LVC07A data sheet.

Schematic

From the NXP 74LVC07A data sheet:

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From the NXP 74HC4051 data sheet:

enter image description here

I'm concerned about the open-drain LVC07A outputs being pulled high to 8V through pull-up resistors. The LVC07A data sheet shows the Vo(max) limit is +6.5V. The footnote says "The output voltage ratings may be exceeded if the output current ratings are observed."

When the output is turned on, I expect the voltage to be close to 0, and current to be about 800 uA (8V through 10K resistor). When the output is turned off, the voltage will presumably be close to 8V, but very little current will be flowing.

At first glance, the current should always be well below the 50mA max output current spec, so I would expect this configuration to be fine.

But on closer inspection of the language in the data sheet, the output current is only specified for the condition when Vo = 0 to Vcc. So technically, there is no output current rating for the case where Vo > Vcc.

I sent this question to NXP tech support 3 days ago, and haven't heard from them yet. Maybe someone on this forum can give me a definitive answer so I can proceed with the design.

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You're kind of in a gray area. The output should not break down until you get to more than 6.5V and you only need 5.6V for a reliable Vih with 8V supply. Remember that "limiting values" aka "absolute maximum" are not intended to indicate where the part should be operated continuously for reliable operation. The recommended maximum output voltage for normal operation is less than 5.5V. Ignore that at your peril- only you know what the consequences of a failure are. It's also better to drive the 4051 inputs right to the rails otherwise the current draw of the 4051 could go up.

You could use a couple of SOT-23 or smaller dual pre-biased BJTs (transistors) rather than the 74LVC07A and avoid any possible problem. That's what I suggest doing.. the ones I linked above are good for 50V and are quite compact, but there are many others.

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  • \$\begingroup\$ Thank you Spehro, this is an excellent and thorough answer, and you provided an alternative solution that is elegant and economical. Since I eventually received a reply to my inquiry from NXP Support, and they responded that my original approach was permissible, I have posted their response and I expect to mark it as the correct answer. \$\endgroup\$
    – sifferman
    Mar 19, 2015 at 21:55
  • \$\begingroup\$ Good that you got something in writing. I find "should be no issue" somewhat different from "is definitely no problem" though. \$\endgroup\$ Mar 20, 2015 at 2:46
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A few hours after I posted this question, I received a reply from NXP technical support. This was the response:

Thank you for your question

Using the 74LVC07A is one of the more common ways to interface 3.3V systems to "high voltage" designs (ie anything higher than 5V)

The note in the LVC07A datasheet "The output voltage ratings may be exceeded if the output current ratings are observed" allows you to let the output be pulled higher than the suggested limit of 6.5V as long as the output current does not exceed 32mA. Your 800uA should be no issue (in fact, you may want to reduce that 10K resistor if you need to improve the rise time of the output signal)

Regards

Tom

Logic Applications Engineering

I find it interesting that he refers to the Absolute Maximum Rating as a "suggested limit." Readers should note that this is the position of one specific manufacturer, NXP, and is not necessarily indicative of the specifications for similar devices from other manufacturers.

Since this answer comes from the device manufacturer, I will mark it as being the correct answer.

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