The question is about NAND flash chips used in all kinds of electronic devices and specifically the recent V-NAND chips. You can see what V-NAND is from http://en.wikipedia.org/wiki/Flash_memory#Vertical_NAND. The idea is that NAND flash cells are stacked on top of each other to increase areal capacities.

Now, Samsung has 32-layer V-NAND chips. According to my understanding, these chips should have 32 times greater capacities than ordinary NAND chips if manufactured using the same process node. True, the V-NAND chips are manufactured by using a bit older process node than the state of the art. According to http://www.extremetech.com/computing/194911-intel-announces-32-layer-3d-nand-chips-plans-for-larger-than-10tb-ssds, Samsung uses 40nm process node for V-NAND, whereas Samsung's state-of-the-art ordinary NAND chips are manufactured using the 19nm process node.

Even taking this into account, 32*(19 nm/40 nm)^2 is approximately 8. Thus, we should have 8 times greater capacities for V-NAND than for ordinary NAND. Considering that one can obtain 1-terabyte SSDs that contain traditional NAND chips, why can't one find any 8-terabyte SSDs that contain V-NAND chips? And similarly, why haven't smartphone and tablet memory sizes become 8 times greater after V-NAND was invented?


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The number associated with a "process node" is related to the smallest feature that can be drawn on the surface of the chip. At one time, this corresponded with the drawn width of the gate in the smallest transistors (channel length), but in modern processes, the relationship is less direct.

The spacing of the deep holes in which you construct the V-NAND structure is necessarily many times larger than the smallest feature that can be drawn on the surface of the chip — mainly in order to account for the cumulative alignment error of the large number of processing steps — so the overall area efficiency of the V-NAND technology is less than you might expect from looking at the raw numbers.


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