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This question already has an answer here:

What is the main reason that reset nets are low true? Is this so that any noise on the GND doesn't reset your system? If it was high true than couldn't you save the little leakage current that is always wasted in the pull-up?

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marked as duplicate by Andy aka, akellyirl, PeterJ, tcrosley, Majenko Mar 26 '15 at 10:31

This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.

  • \$\begingroup\$ A purely high-impedance reset pin wouldn't waste any current (except leakage) regardless if its pulled high or low. If the reset pin has an internal pull resistor, it's a different story. \$\endgroup\$ – Dan Laks Mar 26 '15 at 7:49
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    \$\begingroup\$ This question answered here: electronics.stackexchange.com/questions/7664/… \$\endgroup\$ – Sarrk Mar 26 '15 at 7:59
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When you use a pull up or pull down, the same amount of current is "wasted" - so this doesn't alter the topic.

Low true means: When the device is powered off, all is bound to ground - and reset is true.

Only when final voltage is applied, any pull up to +5V (or 3.3V or whatever) will release the reset.

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Many devices need a reset after powering them to get into a defined state.

The simplest way is to switch on power first and raising reset to high after a short delay.

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