Is there a simple circuit that outputs (min+max)/2 of a single-ended signal given as input?

Question

I have a digital, single-ended, signal that randomly varies between +400mV (logical ‘1’) and 0V (logical ‘0’). I am looking for a circuit to calculate the DC value that corresponds to the average between the maximum value of the signal (400mV) and the minimum value of the signal (0V). So in this case, 200mV. Please note that this does not necessarily correspond to the mean of the signal, because if there is a sequence of consecutive ‘1’s, the mean will be higher than 200mV and if there is a sequence of consecutive ‘0’s, the mean will be lower than 200mV. I am looking for a simple circuit that will output 200mV all the time.

Is this possible ?

My circuit needs to consume as little as possible, so I’d prefer it be implemented using only passive components ...

I don’t know whether this is possible. Do you have any ideas ?

Answer 1

As has been implied in comments, if there is a digital 1 or zero event for some lengthy period of time any peak measurement made will need to rely on analogue values being held on a capacitor and no, there is no way of passively achieving this.

I have previously done this by using "peaks detectors" (an opamp with diode and capacitor) for "storing" the most positive voltage and the most negative voltage - two peak detector circuits are needed. Also, some modest amount of low-pass filtering is needed to be done on the raw signal to prevent noise spikes causing too much of an accuracy limit. Here is the general idea for detecting the most positive peak of the signal: -

For my application the detector needed to be done at very high speeds because I was trying to implement a special circuit for detecting and resolving corrupted high speed data. I used a MAX999 comparator for each peak detection circuit.

If your data rate is modest, a better way would be to use a microprocessor and an ADC and actually measure the levels.

Producing a third voltage (or number) that is the mean of the two levels is of course trivial in comparison.

Answer 2

Here's a slightly different approach-

^{simulate this circuit – Schematic created using CircuitLab}

Whenever the input signal exceeds the reference (shown as 200mV) the input is assumed to be 'high' and the capacitor C2 charges or discharges towards 1/2 the input signal with a time constant of 5msec through the CMOS HC4066 switch. U1B acts as a buffer. If U1 is a CMOS op-amp the droop can be kept very low, even if there are a lot of 0's in a row. U1A as a comparator needs to switch much faster than the time constant of C2*(R3||R4) or the accuracy will suffer.