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Does Intel or AMD publish specifications about the rate at what failures in calculations can be expected on their CPUs? I would suspect it would be very age and temperature dependent, but surely there must be some kind of numbers available?

I'm not interested in obvious manufacturing errors (where a whole lot is defective or something). I'm interested in spontaneous errors due to physical phenomena not related to design error. Whether the error originates in the CPU or some other chip on the system is also of interest (for example a momentary voltage failure to the processor would also result in errors).

I'm curious, but my net searching isn't yielding what I want. I just want to get rough ideas of it I left my program running for X hours how many spontaneous errors I could expect to have.

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  • \$\begingroup\$ See also electronics.stackexchange.com/questions/12757/… \$\endgroup\$ – Martin Jul 1 '11 at 16:16
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    \$\begingroup\$ I'd think it's much more likely you'll get a bit flip in the system memory modules from particle hits. Even if you could find the CPU error rate there's certainly more to consider. Most commercial server hardware uses ECC memory, but I haven't heard of much outside of aerospace that does calculation redundancy. CPU redundancy in case of failure, sure... but not actually checking calculations sort of redundancy. \$\endgroup\$ – darron Jul 1 '11 at 17:45
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    \$\begingroup\$ Yes, from all the material I've found now it appears that memory is the biggest problem. Though the design considerations from AMD do indicate they consider it a problem in their CPUs as well. \$\endgroup\$ – edA-qa mort-ora-y Jul 1 '11 at 18:26
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Look for "alpha particles". That's the main physical phenomena that is relevant.

But no, they don't publish such numbers.

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  • \$\begingroup\$ Thanks, that yields the type of information I'm looking for. So the errors I mean are called "Soft Faults" or "Semiconductor transient failures"? \$\endgroup\$ – edA-qa mort-ora-y Jul 1 '11 at 15:41
  • \$\begingroup\$ I did find out that although they don't publish they (at least AMD) do have guidelines and target rates they achieve. One doc actually gave some rates as well (not officially though). \$\endgroup\$ – edA-qa mort-ora-y Jul 1 '11 at 16:20
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    \$\begingroup\$ How does an alpha particle enter the CPU, considering that it can't pass through more than a few microns of any solid substance? Perhaps you mean cosmic rays, which are normally protons? Or do you mean that there are some radioactive contaminants within the IC itself? \$\endgroup\$ – Oleksandr R. Apr 7 '16 at 10:30
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Some things are present. cpuid with eax=01H return MCA–Machine Check Architecture in EDX 14-bit:

Machine Check Architecture. The Machine Check Architecture, which
provides a compatible mechanism for error reporting in P6 family,
Pentium 4, Intel Xeon processors, and future processors, is
supported. The MCG_CAP MSR contains feature bits describing how
many banks of error reporting MSRs are supported.

Check Intel reference volume 3B chapter 15 MACHINE-CHECK ARCHITECTURE:

The Pentium 4, Intel Xeon, Intel Atom, and P6 family processors
implement a machine-check architecture that provides a mechanism
for detecting and reporting hardware (machine) errors, such as:
system bus errors, ECC errors, parity errors, cache errors, and
TLB errors.

Intel 64 CPUs have additional checks, see chapter 15.6, for example there are:

  • Parity error in internal microcode ROM
  • FRC (functional redundancy check) master/slave error
  • Internal parity error.

See also:

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