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For my final project in my electronics course this semester, I need to design an amplifier with a specific set of parameters. Specifically, it needs to have a gain of 100, a voltage swing of at least 10 Volts peak-to-peak, an input resistance of 75 kilo-Ohms or greater and an output resistance of 100 Ohms or less. After designing a common-emitter amp with a gain of 100 and a voltage swing of at least 10 Volts, I calculated the input and output resistance, and determined that I needed common-source/common-drain buffers in order to get the input and output resistance that I need. After designing buffers that fulfil these requirements, I put them all into MultiSim for simulation. Each stage worked as expected, so I connected them all together. However, the gain of the overall amplifier was far, far less than expected. I checked the voltage being outputted by each stage, and I found that the first stage, a MOSFET common-drain amplifier, was outputting a signal of 2 mV when a 50 mV signal is applied. When I detached it from the rest of circuit, however, it began to output a 50 mV signal, as desired. The stages are coupled with capacitors to simplify the DC bias calculations.

Is there any reason why an amplifier would have a lower gain when coupled? What can I do to fix it?

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  • \$\begingroup\$ Please add schematics/calculations of your task. \$\endgroup\$ – Triak Apr 2 '15 at 23:24
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Yes. The output impedance of one stage was too high relative to the imput impedance of the next stage. To fix this, take the input and output impedances of each stage into account. Generally you have each stage make the impedance lower, and have the input impedance of each stage be several times the output impedance of the stage that is feeding it.

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You will typically require at least 2 or 3 stages for your requirements ;

The first stage or the pre- amplifier should be there to connect the signal source to the system. Also you require pretty high input impedance. If you use a common- emitter bjt without emitter being bypassed, you should be able to achieve it. Common emitter with emitter bypassed will not give you required impedance level. However, dont expect a good gain from this stage. Also try to keep the collector resistance small compared to the input impedance of next stage so that Rc does not absorb much of output voltage.

The second stage should be your main stage which provides the bulk of gain. This should be easy and can be a common emitter configuration with emitter bypassed for high gain. You can use direct coupling if you wish. However, in direct coupling, the voltage swing can be an issue. So to solve this you can use pnp instead of npn in this stage to give a good voltage swing. Again its, your choice whether to use capacitive or direct coupling.

The final stage will be the matching stage. This should essentially be an emitter follower configuration. It will give you a voltage gain of slightly less than 1, input impedance in excess of 100k and output impedance very small.

This scheme will take care of all your requirements viz high input impedance, good swing, and low output impedance.

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