# # of gates in a 32 bit ripple carry adder?

# of gates in a 32 bit ripple carry adder?

I know the answer to this question is (4X32=128). But could someone please explain to me why this is the case? I don't understand how they got the 4?

FYI: the full adder implementation is the one without the use of XOR gate in the C-OUT.

• Show us an adder for one bit. How many gates does it have? Apr 8, 2015 at 4:35
• This is picture of it--- physics.udel.edu/~watson/phys345/protected/exercises/answers/…
– QWE
Apr 8, 2015 at 4:44
• So how many gates does it have? And how do you know the answer is 4 x 32? Apr 8, 2015 at 4:49
• Its in my notes: It says a size(# gates) of a 32 bit ripple carry adder is 4 X 32 = 128 and the speed is 32 X 2 X 15ns = 960 ns
– QWE
Apr 8, 2015 at 4:51
• I believe you flubbed your notes. The 4 gates refers to the logic needed to generate the ripple carry. Since the carry logic is 2 levels per bit, total propagation delay is 32 x 2 x Td. Presumably 15 nsec per gate was provided simply as an example - it bears no relation what you can get in an IC for producing an integrated adder. Apr 8, 2015 at 5:00 