Here is a 4-bit ripple carry adder (taken from here):
The number of gates for each bit in each full adder is 5. The number of gates just for the carry logic is 3. So the total number of gates for 32 bits would be 5 * 32 = 160. There are also plenty of circuits on the web that use 6 gates instead of 5, e.g. this one, which would be 6 * 32 = 192 gates, and the number of gates just for the carry logic is 4.
The difference between the two circuits, is that the first one (above) uses the output of the first XOR as one of the inputs to the OR gate for the carry. In the second circuit, the carry input to the OR gate is derived directly off of the A and B lines.
What this means is the the first circuit will be two gates delays slower than the second because of the XOR. For the first circuit,, the gate delays to generate a final result will be 2 * N + 2, where N is the number of bits. (2 * N because of the AND and OR gates.) For the second circuit, just 2 * N.