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A circuit I have been working with lately consists of a binary counter being fed into an Op-Amp DAC, shown below. One of the major issues with this design is that the input impedance of the DAC will load the counter sufficiently and become problematic if one does not consider the equivalent circuit for each stage (i.e. the counter fed into the DAC). The equivalent source impedance of the counter is trivial, but the DAC is a bit harder to compute.

The most logical approach to this problem seems to be to find the equivalent impedance looking into the Op-Amp, but a textbook I have calculates the impedance looking out of the Op-Amp. Of what use to us is the impedance looking out of Op-Amp if we intend to interface with a previous stage?

Given the following circuit I repeatedly arrive at the following equivalent impedances:

  • Looking into Va : 2R
  • Looking into Vb : (8/3)R
  • Looking into Vc : (32/11)R

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A slightly different rendition of this circuit is shown below with the book's approach to equivalent impedance (For LSB = 1 only, all others = 0).

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Aside from being able to compute the transfer function and associated gain easier, of what use is this form of equivalent impedance and are they similar in nature? It seems to me that these two impedance calculations are entirely different and have no relationship to each other (aside from having the same physical circuit).

NOTE: The overall topology has the output of a binary counter (with TTL logic level output voltages) being fed into the DAC. The designer must either reduce the 5V output of the counter down to 1V logic levels or provide a second stage attenuation of the same amount. This second stage will be present to negate the (-1/4) scaling factor introduced by the first stage shown below anyway, so the designer then has to only adjusted the gain to compensate for the larger inputs; I went with the former design approach initially and ran into issues leading me to ask this question.

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  • \$\begingroup\$ Those two circuits are not the same. The lower one has an extra 2R resistor between the resistor ladder and the opamp. This is giving you the wonky resistance values and will make the DAC give the wrong values, since Va has a gain of 1, Vb has a gain of 4/3, and Vc has a gain of 16/11. \$\endgroup\$
    – Austin
    Apr 8, 2015 at 13:08
  • \$\begingroup\$ @Austin, You are correct in that the second circuit has an additional circuit. The question is more a question of equivalency between these two results and they applications for designing for stage interfacing (i.e. the counter with the DAC). \$\endgroup\$
    – sherrellbc
    Apr 8, 2015 at 13:14
  • \$\begingroup\$ They are very different. You can use superposition to see each stage as a separate inverting amplifier. Va should have a gain of Rf/3R, Vb should have a gain of 1/2*Rf/3R, and Vc should have a gain of 1/4*Rf/3R. When you add together the conversions for each bit independently you get the binary->analog conversion. \$\endgroup\$
    – Austin
    Apr 8, 2015 at 13:16
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    \$\begingroup\$ Aside from the improper conversion, each of the inputs does have different input resistances. If the circuit driving them has a low output resistance, like a CMOS driver or an opamp, that won't matter. But if you want to use a resistor divider to convert the 5V TTL to 1V it won't work right. Also, real TTL ICs (like LS series) don't output 5V and have limited current drive capabilities, so they will be loaded by the input resistance. This won't be a problem if they are all the same. \$\endgroup\$
    – Austin
    Apr 8, 2015 at 13:20
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    \$\begingroup\$ Sorry, I seem to have gone down a rabbit hole. Your original question was what use is the impedance looking out of the op-amp with regards to interfacing. The answer is that it is no use. Whatever you put on the inputs only cares what it sees. I don't get what you mean by the impedance "looking into the op-amp", since the non-inverting input is a virtual ground. If you mean sitting at the inputs and looking in, you have the answer. \$\endgroup\$
    – Austin
    Apr 8, 2015 at 13:36

1 Answer 1

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I'm not sure why you care about the load impedance of the DAC inputs. The whole idea of an R-2R DAC is that the VA, VB, VC, etc. inputs must be voltage sources — i.e., essentially zero output impedance, or at least much smaller than the value of 2R.

If your "counter" does not have sufficient drive capability to meet this requirement on its own, you'll have to add a set of buffers to its outputs.

On the other hand, if the output impedance of the counter is consistent from bit to bit and between high and low, then you can simply reduce the value of your 2R resistors by that amount in order to take that into account.

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  • \$\begingroup\$ Perhaps I am misunderstanding something then. The output of this DAC configuration is inverted and attenuated by a factor of 4. The designer may either reduce the output of the counter (which is TTL logic levels, so reduce from 5V to 1V) or compensate for the larger inputs by attenuating with a second stage inverting amplifier by the same amount. I initially went with the former approach using a potential divider circuit. Of course then, one must consider the equivalent output impedance of the counter and the equivalent input impedance of the DAC to mitigate loading effects. \$\endgroup\$
    – sherrellbc
    Apr 8, 2015 at 13:03
  • \$\begingroup\$ Each input should see a resistance of 3R. This way the opamp stage has a gain of 1/3 * the weight of each position. \$\endgroup\$
    – Austin
    Apr 8, 2015 at 13:11

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