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Working on a PCB layout and just did some ground plane pour.

From working with tube amplifier designs I know that a good star shaped ground design helps a lot to keep hum out of the circuit. Ground loops should be avoided at all costs.

Now here is one of the ground planes of a design I'm working on. Only the ground signal is shown, other signals are hidden.

The ground plane layer (top) of a PCB

If you look closely you'll see that there is in fact a huge ground loop (shown in yellow) along with some smaller ones (not marked):

The ground plane layer (top) of a PCB - loop highlighted

I could break the ground pour where impedance matters least and strategically place a bunch of vias to the second ground layer to get a nice star shaped ground design.

On the other hand it's very tempting to just keep the copper pour as it is and sprinkle a bunch of vias to lower the overall impedance.

What is the better way to deal with the loops? Or are such loops okay in practice?


And some additional info: The circuit itself is pure analog and contains almost entirely low impedance signals below 1kOhm. Highest signal frequency is around 10Mhz. I have very fast rise/fall times in the range of 1000V/µS though.

The circuit will likely operate in the vicinity of a 13.56Mhz RFID reader, so I expect quite a bit of RF noise.

Screenshot of the bottom layer (ground pour only):

The ground plane layer (bottom) of a PCB

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  • \$\begingroup\$ When you talk about the "second ground layer", what does that look like? Is it a 2-layer or 4-layer design? \$\endgroup\$ – The Photon Apr 8 '15 at 23:10
  • \$\begingroup\$ I've never seen problems with what look to be small areas. (you can always exacto a thin spot and break the loop) More important is keeping track of the ground currents and making sure the ground plane is continuous under any fast (rise time) signals. \$\endgroup\$ – George Herold Apr 8 '15 at 23:38
  • \$\begingroup\$ @ThePhoton It's a two layer design. I've added a screenshot of the other layer (only ground shown). \$\endgroup\$ – Nils Pipenbrinck Apr 8 '15 at 23:45
  • \$\begingroup\$ @GeorgeHerold Thanks, there is plenty of ground below the fast signals. \$\endgroup\$ – Nils Pipenbrinck Apr 8 '15 at 23:48
  • \$\begingroup\$ The ground layer of your board is the star point. If you place a via at any sensitive ground node and any significant ground power node you should be fine in most cases. As mentioned your loops are tollerably small and it will be hard to couple much energy to them with the ground plane close by. A bigger danger would be a open loop with a capacitor closing it at an interfering frequency. If you detect problems test a cover shield to see if it helps. \$\endgroup\$ – KalleMP Nov 17 '17 at 21:22
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I could break the ground pour where impedance matters least and strategically place a bunch of vias to the second ground layer to get a nice star shaped ground design.

Without seeing your schematic, we can't say whether a star ground is appropriate or not.

If you do go this way, remember you have to also provide return paths for your signals. Not doing so could itself produce a loop capable of radiating or receiving emi.

just keep the copper pour as it is and sprinkle a bunch of vias to lower the overall impedance.

Without knowing enough to be absolutely certain, I tentatively recommend this solution.

If the top layer copper is well-connected to bottom layer copper, they essentially act as one copper region and you have no loop to worry about.

You may have a small window through the board that isn't plugged with copper, but at 13 MHz the wavelength is 23 meters. A loop with a few mm diameter is not going to pick up this frequency with any efficiency at all.

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    \$\begingroup\$ I've done a sprinkle of vias and let the loops as is :-) \$\endgroup\$ – Nils Pipenbrinck Apr 9 '15 at 11:15

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