3
\$\begingroup\$

In microcontrollers and the like that have programmable drive strengths for GPIOs, said drive strengths are defined in mA. For example you might have a choice of 2mA, 4mA, 6mA, 8mA, etc. My assumption, is that for each output drive strength, there is a corresponding output buffer, and that the software drive strength setting controls a mux that decides which buffer drives the pin. Is that correct?

Second question: I understand that, for example, doubling the drive strength effectively doubles the size of the output buffer (or, equivalently, halves the output impedance), but what is the drive strength actually a measure of? Say the drive strength is 4mA, what does that actually mean? My guess is that the pins Voh/Vol is not guaranteed if you draw a higher current, but I'd be curious to know how these values are characterized/chosen by the vendor.

--

I wanted to add this in response to CL. below, but I'm not sure how to add images in comments.

This is from the same datasheet he references:

test

Edit: jump back and forth a few times between this table, and the "typical" curves below and one gets a better feel for an interpretation of drive strength. The question however remains unanswered. Perhaps this is only something someone who writes data sheets could answer. I suppose the question could also be generalized to "how do IC companies determine their min/typ/max values?". As an example in the image above, the drive strength for "full setting" is given as 15mA, with 3V Vcc, if you want a max Vol of Vss + 0.60V. What is the process to arrive at this number? Set the pin low and force it to sink current until Vol hits 0.6V, then take the current being sunk and round down to the nearest mA? There's probably a statistical component as well to arriving at the number. I'd be surprised if they only characterize one die, probably many over all the different PVT corners.

\$\endgroup\$
  • \$\begingroup\$ I don't know about internal details, but I believe you are correct that there are multiple buffers muxed together. I don't think the drive strength is well defined but there are two things which are sure: 1, higher drive strength means faster rising and falling edges for high-speed signals and 2, higher drive strength means more ability to sink and source DC current (check the datasheet). Adjusting drive strength lower often reduces radiated emissions dramatically. \$\endgroup\$ – mkeith Apr 12 '15 at 21:36
  • \$\begingroup\$ I think drive strength is a spec saying how much current it's guaranteed to deliver at the thresholds Voh or Vol for whatever buffer standard you are using. I don't think there are multiple buffers muxed together rather the same topology with more transistors added in parallel to deliver more current. \$\endgroup\$ – Some Hardware Guy Apr 12 '15 at 21:43
  • \$\begingroup\$ @mkeith, yes i've adjusted drive strength for both of those purposes as well, but the lack of definition of the drive strength has always bothered me. \$\endgroup\$ – mhz Apr 12 '15 at 21:54
  • \$\begingroup\$ @SomeHardwareGuy that would make sense, but it seems odd to me that the drive strengths would always fall on such clean numbers. Perhaps the vendors simply round down to the nearest mA? \$\endgroup\$ – mhz Apr 12 '15 at 21:56
  • \$\begingroup\$ I don't think there is any real standard of what the drive strengths mean or how to measure them. I have seen inconsistencies in rise times among different chips from the same vendor. Maybe the DC characteristics are more consistent. \$\endgroup\$ – mkeith Apr 12 '15 at 22:03
3
\$\begingroup\$

The more current you source or sink through a pin, the more the voltage deviates from the ideal voltage.

Here is what the datasheet of some random microprocessor says about the relationship between output current and output voltage (you should find such specifications in any datasheet):

 output current vs. output voltage at different drive strengths

The question is not so much how much current the pin can handle (if you go near the absolute limit, your circuit is likely to fail anyway), but how much of a voltage drop you can tolerate.

Furthermore, a higher drive strength can supply the needed current faster when switching, which means that the voltage also switches faster, i.e., you have shorter raise/fall times. This implies that higher drive strength can result in increased EMI.

\$\endgroup\$
  • 1
    \$\begingroup\$ But it must mean "all bets are off if you go past this limit"... If the data sheet says you can drive 10mA through a pin and you try to drive 1A through it, I'd expect something to break. I don't think there are any guarantees that a generic microcontroller will limit the current output. If I remember correctly, I think I once broke a MCU by continuously driving too much current through a pin, in which case the internal port circuitry broke, but the MCU remained functional otherwise. \$\endgroup\$ – Lundin Apr 13 '15 at 9:38
  • \$\begingroup\$ If I interpret these graphs correctly, you reach a plateau even if you short a low output to VCC. I'd guess to get more current you'd have to go higher than VCC, which is not allowed anyway. \$\endgroup\$ – CL. Apr 13 '15 at 10:34
  • \$\begingroup\$ !test \$\endgroup\$ – mhz Apr 26 '15 at 17:32
  • \$\begingroup\$ The graphs already show what happens when you exceed the rating of a single pin. \$\endgroup\$ – CL. Apr 26 '15 at 17:56
  • \$\begingroup\$ Thank you for posting these charts CL, they've helped me quite a lot. \$\endgroup\$ – mhz Aug 8 '15 at 19:36

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.