For the Ethernet application in my design using RMII interface, I need to drive two CMOS loads (two reference clock pins, one of a Freescale Kinetis K60 Microcontroller and one of a TI's PHY chip) through a 50MHz oscillator. The oscillator specifications mentions the "output load" parameter as 15pF. As per the datasheet of microcontroller and PHY chip, the input capacitance of pins is given in general as 7pF.

Will it be ok if I drive these two pins through only one oscillator output?

The reason for using single oscillator is that it will clock both the micoronctroller and the PHY reference clocks together almost skew-less, and it will also save some cost by avoiding the use of an external clock buffer.

Any help would be highly appreciable.

  • \$\begingroup\$ In volume, a 1-gate CMOS buffer costs less than $0.10 (plus the per-location pick & place charge, which is on the same order of magnitude). \$\endgroup\$ – The Photon Apr 14 '15 at 15:47
  • \$\begingroup\$ Just to confirm, you mean I should consider adding a clock buffer (1:2) on oscillator output? \$\endgroup\$ – LoveEnigma Apr 15 '15 at 5:19
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    \$\begingroup\$ Even just a 1:1 buffer. But choose one with sufficient drive strength to drive the load you have with the edge rates you require. The oscillator you have could probably work without an external buffer, but if you add the buffer you'll be able to choose the buffer you want and control the performance. \$\endgroup\$ – The Photon Apr 15 '15 at 5:23
  • \$\begingroup\$ Okay, if I can drive two outputs by using just 1 output buffer that would surely be great. Thanks for the tips, I will look for a buffer with good driving strength and fast edge rates. \$\endgroup\$ – LoveEnigma Apr 15 '15 at 5:48
  • \$\begingroup\$ To avoid EMI, don't make the edge rates faster than you actually need. \$\endgroup\$ – The Photon Apr 15 '15 at 5:50

There are at least two popular solutions:

  • two RMII clock slaves (both PHY and MAC)

    enter image description here

  • one RMII clock master (PHY) and one RMII clock slave (MAC)

    enter image description here

Other variants are possible. For example, if your MCU could be clocked by a 50 MHz source, you can use a variant with the MAC as RMII clock master and the PHY as RMII clock slave.

| improve this answer | |
  • \$\begingroup\$ Thanks for the suggestion, asndre. Somehow I am unable to see the images you have attached. Our design has PHY as RMII slave. MAC built inside the MCU requires a 50MHz input as its main clock if MAC is to be used in RMII mode. Hence, I need to feed the 50MHz oscillator output to two pins: MCU main clock as well as PHY RMII reference clock. Ultimately, I decided to use a simple low skew low jitter 1:2 clock buffer (non-PLL based). I give the 50MHz oscillator output to input of buffer and I use two outputs of buffer for clocking MCU and PHY. \$\endgroup\$ – LoveEnigma May 6 '15 at 8:19

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