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We are trying to calculate how many I2C slaves we can hook up the I2C bus. We tried to run a square wave through a serial resistor and measure the rise time but we get a strange result. More nodes decrease the capacitance, not increasing it as expected.

Is there another way to get the capacitance?

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  • \$\begingroup\$ Your method is flawed - it won't take into account input resistance lowering when more devices are placed in parallel. \$\endgroup\$ – Andy aka Apr 23 '15 at 7:21
  • \$\begingroup\$ Good point. We also disconnected the the signal generator and measured the rise time of the I2C bus clock, giving about the same capacitance as with the signal generator. However we also got the answer from Renesas that it was best to just measure on a full system. In the end we are interested in how many nodes we can connect before the signals get out of spec. Thank you for the input. \$\endgroup\$ – Max Kielland Apr 23 '15 at 7:36
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The answer is "it depends." It depends on how strongly each device can drive the I2C lines; on how small of pull-up resistors all can tolerate; on what speed the I2C is clocking at; and how much parasitic capacitance is induced by the bus wiring length and topology. Smaller pull-ups, slower clock, and shorter (external-PCB, good spacing) bus distances all reduce capacitance and thus allow more devices. Even prototyping on a solderless breadboard is not ideal, as the pin connections will likely introduce significantly more capacitance than say, a 2-sided PCB will. All of these aspects could be calculated and/or simulated, but Renesas has a good point in that "testing it" may be the fastest and most accurate way to arrive at a real-world answer.

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