This question may be ridiculously rudimentary but I have been going through Xilinx's available guides and videos tearing my hair out... my problem is simply this: I want to use the base 100Mhz clock on my nexys4 DDR board and multiply it by 2. Can this be simply achieved using the .xdc constraint file? I have tried using the clocking wizard IP but perhaps I simply don't understand how to instantiate the clock with respect to my source design. I have attached a few pertinent captures to better explain my issue. Any help on this would be greatly appreciated.
No, you can't.
The .xdc doesn't control the design, it informs the tool of the physical reality of the board. Setting the clock to 100MHz or 200MHz doesn't change the design in any way, the tool will always verify that your design works with the constraint you inputted. If you forget to input constraint or input wrong constraint, you get in a situation where the tool tells you the design works when it doesn't (or vice-versa).
You have to use the clocking wizard. The input clock to the clocking wizard comes from an oscillator on the board (or another clock generated by a clocking wizard), in your case the 100MHz oscillator clock. You set the wizards's parameter for the desired output clock frequencies (2x time input clock), and voilà!
There are several reference design for your board, you should look at them to see how the core functionalities works.
Not to my knowledge. Generally what you need to do is specify the input clock frequency in the constraints file, then instantiate the necessary clock management/PLL components to synthesize the new clock frequency. The constraint for the internal clock should be generated automatically by the tools.