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I've never used a DMA before and I'm reading the datasheet for the Atmel SAM 4E This question does not necessarily have to pertain to this device, it can apply to any device that supports DMA if they all essentially work the same.

But how much data can I transfer ?

If the transmitter and the receiver have a 4 deep FIFO, then I can transmit 4 bytes safely, without having to worry too much about lost data. I'd then have to wait until I can get some indication that the fifo is clear and ready to accept more data.

This then brings me to using flow controlled UART.

If I setup both transmit side and receive side to support flow control, then will the transmitter pause transmitting, when it sees that CTS is not set from the receiver and resume when the CTS is set?

If this is true, then I would assume then its possible to send as much data as I want without having to directly read the UART receive registers and send as much data as I want.

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Generally DMA and FIFO are two independent solutions to address the same problem - deal with asynchronously transmitted data (store it in some memory) until the cpu has time to process it. FIFO is limited by it's size, so if some data is written to it while there is not enough space, something would be lost. On the other side, DMA is capable of dealing with streams limited by it's counter size only (and the source/destination memory size, of course). The DMA transmission in for UART (and generally) can be configured to be triggered by specific interrupts. For example when the FIFO count is reaching some level. Your second question is not directly related to DMA/FIFO thing. The control flow signals are only affecting the transmitter itself. If it is configure to wait for CTS before sending anything, it will wait. Even if configured with DMA, unless the flow control is implemented in the software, of course..

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  • \$\begingroup\$ So then there is some "communication" that happens between the UART and DMA, such as to indicate successful transmission, and only when it receives this, will it then resume filling up the transmit buffer. Is that a correct statement ? \$\endgroup\$ – efox29 May 1 '15 at 17:55
  • \$\begingroup\$ Yes, as I mentioned, the DMA transfer for individual bytes can be configured to be triggered by UART's interrupts. \$\endgroup\$ – Eugene Sh. May 1 '15 at 18:15
  • \$\begingroup\$ On this specific chip there is a dedicated "DMA Hardware Handshaking Interface" thing dealing with it. But it is implementation specific and not related to Cortex-M4 core. \$\endgroup\$ – Eugene Sh. May 1 '15 at 18:28
  • \$\begingroup\$ I try to use UART, DMA for its FIFO buffer and FreeRTOS at the same time for the first time. It is very comfusing... \$\endgroup\$ – Tedi Sep 29 '16 at 10:02

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