I am building a 10-channel audio DAC using 10 ES9018 converters and an ultra low phase noise clock (Pulsar) with femtosecond jitter. What would be the best way to distribute the clock's signal to the 10 converters? It is assumed that the clock's board will be mounted directly on the PCB where the 10 converters are soldered. The clock's frequency is 100 MHz.
For jitter the big thing you want to avoid is noise coupling into the clock lines. Your clock device is single-ended, so that's a strike against you, but you can still consider routing it with shielding. That is, route ground traces next to the clock as much as possible, but avoid vias on the clock line (keeping it all on one layer should be paramount). For skew (also may be important for you), keep the electrical length of the clock lines equal to each converter.
Also, follow these suggestions closely: A Short Course in PCB Layout for High-Speed ADCs