How is VHDL used?

Question

I'm new to hobby electronics/robotics and am trying to understand the use case for VHDL. The syntax is easy enough to understand, but I'm not seeing the "forest through the trees" on a few items.

For one, I'm trying to ascertain exactly what components of a digital system can be represented in VHDL. Can it be used for describing the behavior of CPUs? MCUs? PCBs? System-on-a-chip-type components?

Second, does VHDL compile to anything? Since it's describing hardware behavior, I'd imagine the answer would be no, but then my next question is: so then what happens to VHDL? Is there some kind of magic machine that takes VHDL as input and spits out chips & circuitry that accurately reflects the hardware modeled by the VHDL?

Answer 1

VHDL is used in ASIC and FPGA development, as is Verilog. Pretty much all commercial chip design is done in one of those two.

There's not so much a magic machine as a pipeline of large expensive pieces of software. The flow looks like this:

• humans write VHDL, then simulate in a program such as Modelsim to validate design.
• this is converted to a gate level netlist, which is usually also in Verilog but replaces all logic expressions by instantiations of logic gates (AND/OR/NOT/D-type flipflop). This is vaguely similar to a software compiler outputting machine code.
• another round of software does place and route, assigning those gates to locations on a chip. At this point it becomes possible to calculate timing and power consumption.
• additional bits of hardware are substituted in for things that aren't made out of logic gates (memories, analog subcomponents)
• For ASIC, finally the gates are converted into a sort of vector graphics format called GDSII, which is sent to the factory.

Answer 2

Some good answers above. But VHDL is also behavioural modelling language. You can use to represent the behaviour of any digital system, arbitary behaviour. It effectively comes into two flavours (all part of the same language), behavioural statements which describe the behaviour of a digital system (complete digital system, components: CPUs, FPGA's, ASICS, CPLDs), and synthesiable parts of the language.

You can describe an entire system using behavioural VHDL and simulate it. You can write test pattens in VHDL. You can create, build the system, test it and verify its behaviour with your behavioural models and test data. I don't say here how you design and build the actual system, it's down to the designer (human being) to do that, in this scenario, the VHDL is an abstract representation of the behaviour. There are behavioural statements (as other posters have indicated) which can not be synthesied into working digital logic, so a synthesis tool can not automatically construct a logic circuit implementation.

The other fundamentally important way VHDL is used is in synthesis and to do this, you have to restrict yourself to a subset of the language. Writing behavioural code which is then synthesized into logic gates (or other logic functions which match your target architecture of the device in which you are going to place the design - FPGA for example).

You can describe the behaviour as a finite state machine in textual written code and have a synthesis tool create the logic circuit for you. (You might do some of the state assignment yourself in the VHDL code). You can write statements such as: A:= B* C + D and the synthesis tool will create a logic design to carry out the multiplication and addition of the integers represented by B,C, D.

You can have models of complex logic functions (complete microprocessors) and connect these components together in VHDL (and then simulate).

So VHDL can model ANY logic function, no matter how simple or how complex. Microprocessors, UARTS, system on chip. But I've never heard of it being used for PCBs, not in an analogue sense. But if you have a complete circuit design containing multiple digital logic chips, including complex functions such as microprocessors then yes, VHDL can model the entire lot and you can carry out simulations of it. You can write high level test data, (also in VHDL) and stimulate your VHDL model of your sytem with it and verify the entire design does what you want it to do.