# Cause of shoot-through in H-bridge

I've designed an H-bridge for a 15A DC motor. Power is applied by plugging in a very high-capacity Lithium battery. Unfortunately, when I plug in the battery, one of the transistors goes pop instantly and shorts across itself. This ultimately shorts the battery to itself which makes me unhappy. V_BATT is a 14.8V Lithium battery. The transistors are N-channel MOSFETS. U1 is an H-bridge driver IC.

I've come up with two possible root causes. I'd like some help figuring out which one is more likely.

1) A nasty inductive spike is being generated during the initial current surge due to the natural inductance of the battery cables and copper traces. The spike exceeds the Vds of the FETs, causing them to fail. The Vds of the FETs I'm using is 40V, so I find it likely the inductive spike is exceeding that. I plan to use a snubber and voltage clamp circuit to reduce the spike.

Or,

2) The sudden rise of voltage on the drain of the FETs causes the gate voltage to also rise due to the intrinsic capacitance between the drain and the gate. This effectively turns on all of the FETs and causes shoot-through and burns them out.

I'm leaning towards #1 being the main culprit, but I can't justify why #2 isn't also causing a problem. Especially since I have 50$\Omega$ resistors on each gate pin. Even if the gate drive pins of U1 are trying to hold the pins low, the resistors would isolate the gate pins for a short time.

Is it likely the problem is a combination of both items? Or is #2 not really an issue? If #2 is actually happening, what can be done to suppress it?

• What have you got driving your 4 phase inputs? May 14 '15 at 0:50
• Directly from a uC. May 14 '15 at 0:53
• Have you watched on a scope, what happens to those uc outputs when you plug in the battery? May 14 '15 at 0:57
• No, but I know what you're getting at. In my first attempt to make a "quick fix" on the board, I isolated the h-bridge power from the uC/driver using separate batteries (with common grounds, of course) . I plugged in the uC/driver's battery first and then the h-bridge battery. Therefore, the uC and the driver IC were fully powered on and stable before I applied power to the h-bridge. With that in mind, I don't think it's a power-on artifact of the uC or the driver. May 14 '15 at 1:02
• Which mosfet is dying? Is it always the same one? How many times has it died? May 14 '15 at 13:22

Some driver circuits dont have UVLO [undervoltage-lockout], and they can come on wrong or oscillate at the beginning of the work cycle. Do a transistor Schmitt-trigger undervoltage-lockout circuit with several independent outputs: one output to keep the driver disabled by applying a shut-down on its input, and other outputs to keep the gates of MOSFETs down to source voltage (careful with the upper transistors gates, they have different source potential and therefore the transistors to lockdown them should be kept on by some voltage shifters, like the voltage shifter in the H-bridge driver inside the integrated circuit...)

The trigger should release the gate lockdowns and the driver shutdown simultaneously, or eventually prioritise the lockdown of the top mosfet by the synchronous diodes lockdown (the top mosfet to not be possible to be "activated" without diodes being "activated") Am sorry but my english may be not very well inteligible here... Try use anyway a safety circuit to not release the gate of transistors (to shunt them to source) for a few miliseconds after the battery is first applied.

A possible help (yes, i suspect more the #two of your guesses) can be use of a coil on the supply wire, several tens of microhenries, plus several thousand microfarads parallel on the supply lines. This will slow the voltage rise on the supply and possible avoid Miller charging of the gates. Calculate the number of microhenries and microfarads to slowdown the rising voltage to 0,5-1V/microsecond and should be fine from this point of view.. But from my opinion, i will apply the previous method, the UVLO circuits..

• The MC33883 has an undervoltage protection feature ("The VCC and VCC2 pins have undervoltage (UV) and overvoltage (OV) shutdown. If one of the supply voltage drops below the undervoltage threshold or rises above the overvoltage threshold, the gate outputs are switched LOW in order to switch off the external MOSFETs"), just search for "undervoltage" in the datasheet, so the driver turn-on behaviour will be well behaved. I think OP was most likely misdriving the inputs of the gate driver, e.g. due to a bug in the Uc code.
– jms
May 5 '16 at 3:50
• True, i searched and its there, but it's at 4 Volts. This may be open for troubles.. Anyway, i still recommand an external UVLO circuit to keep all the gates down until voltage reaches 11V and to be slightly temporized (a few miliseconds) at opening the gates. And definitely to open the bottom transistor gates first. May 6 '16 at 13:42

Use gate driver ICs. A few bucks and problem solved. That is what those are designed for, and they do it well. But if you have the luxury of design time and money to R & D this problem, good for you. I usually don't time & money to burn due to the engineering time which kills any minute savings you were making unless you selling a "million" gidgets. If don't R&D well it can fail in the field as well. Just a thought.

I think, if you are going to use N-Channel fets for high-side and low-side, you need to develop appropriate drive voltages for the high side ones. (There are IC's that will do this for you). If you don't want to go that route, you may need to change the high-side (the ones that connect to the + rail) fets to P-Channel types and drive them accordingly. :-)

• It doesn't seem like you read the question or looked at the schematic I posted. The MC33883 H-bridge drivers that are labeled in the schematic and linked to in the text provides the necessary boost capacitor drive for the high-side FETs. Jan 4 '17 at 1:15