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I am designing an FSK transceiver that operates from roughly 902-928 MHz with at least 18 possible channels. Using the 5-bit DAC in my microcontroller, I plan to control a Crystek VCO (CVCO25CL-0902-0928). The voltage vs. frequency equation is as follows:

$$\\(0.5V,902 \text{ MHz})\\(3.5V,928 \text{ MHz})\\ \therefore f_\text{MHz}(v)=\frac{26}{3}v + \frac{2693}{3}$$

The 5-bit DAC at Vdd=5V will provide 18 unique frequency channels, however, I am uncertain of how my microcontroller will identify each of them. Below is a receiver block diagram:

RX Block Diagram

900 MHz is far too high for the ADC of the MCU to sample but is there some sort of frequency divider to bring it down? Some FSK receivers have two band-pass filters for the mark/space frequencies but I plan to have 18 with a 1.355 kHz separation - that would require 18 tuned band-pass filters. My hope is to avoid using a DSP as well.

In other words:

  • How can the MCU infer each individual channel with 1.355 MHz spacing?
  • Is 1.355 kHz spacing to little (i.e. should I reduce the number of channels)?

EDIT @Andy aka: The reason I have only 18 unique channels is because of the DAC resolution. A 5-bit DAC provides the following table of voltages. Plugging them into $$f_\text{MHz}(v)$$ gives:

VCO DAC

The SAW filter I was thinking of using has a center frequency of 915 MHz (AFS14A26-915.00-T3). Haven't thought about interference as of yet but I plan to use a unique communication protocol depending on how many channels are used. If just two channels are used (2FSK) then I could have an address byte to identify the slave/master (somewhat like I2C). Alternatively, the PIC could switch to different channels that are less noisy. If you have more thoughts on this I would be interested!

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  • \$\begingroup\$ can you put a mixer in your ??? block and then you can digitize with a much lower rate? \$\endgroup\$ – crgrace May 14 '15 at 20:15
  • \$\begingroup\$ What data rate are you planning on using? 5 bits gives you 32 options - why only 18? What is the resonant frequency bandwidth of your saw filter? What interference contingency plans do you have? \$\endgroup\$ – Andy aka May 14 '15 at 21:03
  • \$\begingroup\$ The VCO spec doesn't appear to say how quickly it can be modulated. Is this something you need to consider? It will certainly affect the data rate you envisage (still unstated). \$\endgroup\$ – Andy aka May 14 '15 at 21:57
  • \$\begingroup\$ I did think of that - it strange that the information is not available on the datasheet... One VCO that seems geared more towards RF applications was the MAX2623, however I still cannot find the settling time. The data rate will be determined by the VCO settling time and ADC sampling time - I will try to make both as fast as possible. \$\endgroup\$ – ElectroNerd May 14 '15 at 22:11
  • \$\begingroup\$ Thinking of using the PIC16F1455 at 16 MHz Fosc. The fastest ADC clock period would be 1 us. \$\endgroup\$ – ElectroNerd May 14 '15 at 22:23
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Standard practise to use a mixer (multiplier), with a local oscillator to drive it. Don't forget you'll end up with two side bands when you do that, you might want to then filter one out, but you should have an antialiasing filter on the input to the DAC anyway.

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  • \$\begingroup\$ To avoid using two mixers for the complete transceiver design (one for the TX and another for the RX), would it be reasonable to use SPDT RF switches (e.g. [SKY13351-378LF ](skyworksinc.com/uploads/documents/SKY13351_378LF_201132H.pdf)) to switch LO's, etc? I would estimate using at least 4 switches but am worried that the insertion loss would be too high. \$\endgroup\$ – ElectroNerd May 16 '15 at 0:23

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