I am learner in verilog with less knowledge and trying to develop more understanding.I wrote a simple verilog code and synthesize and implement it. I do not have understanding of Look up tables. When I saw design summary, It's giving like:
Device Utilization Summary

Number of 4 input LUTs 24(Used) 9,312(Available ) 1%(Utilization)

What does it means? as it mention available no of 4 input LUTs are 9,312. Is it Device specification?



For most of the designs to work, routing resources are used to connect different LUT i.e. Look-Up Tables and FlipFlops that are placed in various Configurable Logic Blocks (CLB). The type and amount of resources required, the frequency at which the circuit is going to be driven during actual implementation is approximated/determined by the toolchain using these resources and depending on the way the circuits are modeled.

To be detailed about LUTs, you can call them a Function Generator imeplemnted in CLB. One of the Xilinx resource document say,

These function generators can implement any arbitrarily defined Boolean function of multiple inputs.

For example, see what summary you get when you implement a S-R Latch and see the design summary to find that it uses 2 LUTs and 4 IOs (2 IBUF, and 2 OBUF).


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