I have created an mif file in Quartus and I am working with cyclone 2 Altera. My query is "How can I use this mif file to initialize a variable in my top level design architecture"? Let me elaborate. My aim is to produce a sine wave using FPGA storing the values in look up tables and accessing it from a VHDL program. I calculated the look up table values myself using MATLAB. I have put them in a mif file. Now I think I should write a program that takes in these LUT values and feed it to the DAC.

For this I am trying to write a vhdl program with a variable that is initialised with my LUT values. I will then assign the values to an output vector variable(should it be a two dimensional array?) and then use the DAC.

I heard there are no direct DACs in cyclone 2?


1 Answer 1


You can use the memory IP cores to create a memory with initial mif content. You can check the IP core user guide for more information.

Another solution is to use VHDL attributes to initialize the content of your variable. You have to be confident that your code is indeed interpreted as a ROM by altera, otherwise the attribute will be ignored. This is the example usage from altera's documentation:

type mem_t is array(0 to 255) of unsigned(7 downto 0);
signal ram : mem_t;
attribute ram_init_file : string;
attribute ram_init_file of ram : signal is "my_init_file.mif";

A third way, which I prefer, is to initialize the memory in VHDL code, for example:

type rom_t is array(0 to 1023) of signed(15 downto 0);

function fill_sin_rom return rom_t is
    variable ret : rom_t;
    for i in ret'range loop
        ret(i) := to_signed(integer((2.0**15 - 1.0)*sin(2.0*MATH_PI*real(i)/1024.0)), 16);
    end loop;
    return ret;
end function fill_sin_rom;

constant sin_rom : rom_t := fill_sin_rom;

This code would be in a package for an architecture declaration sections. It requires use ieee.math_real.all and use ieee.numeric_std.all to work. The advantage of this solution is that it also works in simulation, while the attribute would not.


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