How does de-coupling and bulk capacitors work? what difference do they make adding them to the circuit.. Can anyone help me using a simple circuit that shows the effect of decoupling and bulk capacitors on a circuit? (I need an explanation such as the first circuit must not contain these capacitors and results must be shown and the second circuit will contain them and would like to see and compare the effect of adding them).
There is, in a sense, no qualitative difference. The difference is one of scale, both of current and of time.
A bulk capacitor is used to prevent the output of a supply from dropping too far during the periods when current is not available. For line-powered linear supplies, this would occur during the periods (say, 10s of msec) that the line voltage is near zero. It also applies to the circuit as a whole. That is, an electronics assembly containing multiple circuit cards might have a single set of bulk capacitors in the power supply.
Decoupling capacitors, on the other hand, are used locally (such as 1 per logic chip in some systems) and are intended to supply current for much briefer periods (typically 10s of nsec for TTL systems) and much smaller currents. As a result, decoupling caps are typically much smaller than bulk caps.
This is not entirely a hard and fast rule - for some high-speed analog parts a mix of different decoupling values is recommended, with the smallest values providing the shortest compensation times, and larger caps being used as well. High-speed A/D converters often used to recommend a 0.1uF / 10 uF combination. Many logic boards have a mix of values scattered around. CPUs, in particular, are often surrounded by largish (10 - 100 uF) electrolytics, with a whole bunch of small SMD ceramic caps right under the chip.
As for demonstration circuits, only bulk caps make easy demo's. Take a transformer output of, let's say, 6 VAC, and run it through a bridge rectifier. Load the output of the bridge with a power resistor (like, 10 ohms) and look at the voltage across the resistor - it will drop to zero 120 times per second (100 if your line frequency is 50 Hz). Now place a bulk cap of 10,000 uF on the bridge output, and the output will be much smoother, with 120 Hz dips - it will look sort of like a sawtooth - but in general the voltage will be much smoother.
Decoupling is harder. Try setting up an op-amp amplifier on a solderless breadboard using a high-speed op amp and long wires running from the breadboard to the power supply. There's a good chance the output will oscillate with no input. If you put 0.1 uF ceramic caps from the supplies to ground, and do it right at the op amp supply pins, this will often clear up the problem. Or not - solderless breadboards aren't good for high-speed work even if you're careful, and some op amps are very stable, but it's the best suggestion I can come up with.
Very briefly, it's about striking a balance between the impedances and ESRs of various types of capacitors in order to meet the power supply requirements of of a given circuit/chip.
Decoupling caps are one level of intermediary reinforcement of the power supply, and typically in the 10s or 100s of nF & almost always ceramic / multi-layer ceramic, and get put as physically close as possible to the power pins of chips. Their small size, low ESR, & proximity to the chip's pins minimises inductance & allows them to supply brief current spikes demanded by the chip.
But what recharges the decoupling caps? Often the same reason you need decoupling caps (the tracks & power-planes can't supply the current spikes because of their own inherent inductance) is the reason for needing another intermediate level of reinforcement of the power supply, 'bulk capacitance', to help the 'decoupling caps' to recover their charge fast enough. These can vary significantly in capacity, from a few uF to hundreds or even thousands of uF, depending on the unique requirements of the circuit.
I will attempt a noob-friendly explanation.
Most electronics do not draw constant current from the supply. Some draw current in quick bursts, like a logic chip/cpu which will draw a current spike on each clock cycle, others like an amplifier will draw current depending on signal and what the load requires.
Now, these circuits usually need their power supply voltage to be within certain limits to work properly. If the voltage sags too much, then the cpu could crash, for example. Or, if the supply voltage has too much noise on it, your low-noise amplifier will no longer be low-noise.
The relation of this to decoupling capacitors is simple:
You have a voltage regulator. Some are faster than others, but all have a non-zero response time. When load current varies, it won't react instantly. If the load current varies quickly, then you need a capacitor on the output of your regulator to keep the output voltage stable. Some regulators also require specific capacitors for proper operation.
This capacitor is usually called "bulk cap". Depending on the application, it will be something like 10-100µF (sometimes more) and its purpose is to store enough energy to power the circuit until the regulator reacts to a quick change in current demand.
Next is supply inductance. I hope you know that the voltage across an inductance is -L* di/dt. This means fast variations of current across the inductance of long traces will result in non-negligible voltage drop when current changes quickly.
A local decoupling cap with a low inductance (ie, ceramic surface mount) placed close to the chip addresses this problem. Its value is small, so it stores very little energy, but that is not its purpose. It is there only to provide a low inductance help to the bulk cap.
Now, depending on the circuit, you could have one LDO with just one cap powering one chip, or a PC mobo where you have tons of bulk caps and hundreds of ceramics.
Another very important role of decoupling caps is EMI management: they make high speed current loops small, which reduces radiated EMI. When properly placed, they can also be used to ensure high di/dt currents do not turn your ground into a minefield.
An alternative explanation (two sides of the same coin), is that they filter out spikes caused by the switching of the logic gates. Generally good practise to throw in some 0.1uF electrolytics or tantalums and place next to the logic devices also 100nF ceramics. The issue is that the electrolytics are not a perfect capacitor and their high frequency response isn't that good, so the inclusion of a low value ceramic cap in parallel with the electrolytic extends the frequency response so that the overal combination is more effective at removing the spikes. The spikes contain high frequencies.
If you don't use decoupling caps, chances are your logic design isn't going to work.