Take for example the schematic below of a inductive receiving circuit in RFID, where we want to maximize the voltage over the load resistor R4 (R3 is the resistance of the inductive coil, and the voltage source represents the signal that is received and induced in the coil)
The voltage is now V2*R4/(R3+sL1+R4), which in my opinion can easily be maximized by adding a series resonant capacitance, such that the impedance is real at resonance (and further maximized by increasing R4). However, I read that voltage maximization for circuits as this one is done by adding a parallel capacitance. When doing the calculations, I always obtain a voltage that is lower than the one for the simple series resonant circuit I present here.
EDIT: when considering the measuring device to have an infinite input impedance, the measured voltage for the series resonant circuit equals the applied voltage V2. For the parallel resonant circuit, it equals 1/(sRC) times the applied voltage V2. Is it possible that the eventual best solution is depending on the size of R and C and the operating frequency (whether their product is larger or smaller than 1)?