So I found this very basic sawtooth generator:
http://www.radiolocman.com/shem/schematics.html?di=143990
I have a few questions about it:
I understand that when the capacitor C_T charges fully to a high
, the inverter goes low
, thereby letting the C_T discharge through the D_2 diode. But after that where does it drain? Does the inverter, at it's output, open a drain to the ground? Is it exactly like a CMOS NOT gate, where the NMOS half drains to ground?
What can I do to make the discharge faster so I can make the negative edge more vertical? Though, I don't care much about the rising upward ramp, that does not have to be linear (could be an upside-down capacitor charging plot for all I care).
Just how much frequency can I squeeze out of this sawtooth generator, say, if I'm using a 74LVC1G14 with 2.2ns propagation delay? I was thinking of using 1nF-100pF for C_T and 10-100ohm ranges for R_T... Can I go for hundreds of MHz? Or Is the high charging current (for R_T being so low) too much for the C_T to charge at a consistent time? If so, I happen to have the easy option of using a V_CC = 2.5V and V_DD = 5V.