For single, discrete logic gate chips, why is it that we don't have adjustable types? The closest we have are those that vary along with voltage supply.

I suppose it uses a voltage reference in the chip. So why not have it be set externally? Medium voltage (power supply level) logic could be useful in some applications.


2 Answers 2


You can have adjustable logic level thresholds if you really want to. Older Logic Analysers use very fast comparitors that allow the threshold voltage to be set for the particular logic family and circuit that you are working with.

You can still do that today if you really need to.

But for general-purpose logic design, why would you want adjustable logic levels? The TTL standard has served well for the past many decades and is still applicable today, even with new chip families that weren't even dreamed of 30 years ago.

The actual logic levels inside most chips does NOT rely upon a specific voltage reference. Instead, the circuit is carefully designed to have the appropriate logic level thresholds for the particular manufacturing process that is used to build the chips.

  • \$\begingroup\$ +1 for identifying the misconception it's due to an internal reference and dispelling that, very important to make clear that it's design of the input stage's Vbe/Vgs responses. :-) \$\endgroup\$
    – Asmyldof
    Commented May 28, 2015 at 2:45
  • \$\begingroup\$ indeed, the threshold is defined by the size ratio of various devices in the chip. There is no explicit threshold. \$\endgroup\$
    – crgrace
    Commented May 28, 2015 at 5:29
  • \$\begingroup\$ Power supplies that provides, say 16-32V and happen to also need a logic circuit to regulate it need to step down the voltage to 5V just to sometimes do 3V logic. With logic chips with externally set voltage references and current limited resistors, we can all provide power supply voltages and operate on those logics too. \$\endgroup\$
    – Dehbop
    Commented Jun 4, 2015 at 9:49

Power efficiency and performance are main goals. Designing a logic family to operate with a well defined power supply range allows to optimize to meet those goals. In particular there is a distinct advantage in reducing (and thus limiting) power supply range, that is reduced power dissipation.

The now obsolete CD4000 CMOS family was indeed capable of handling a very large power supply range (the supply could range from ~5V to ~15V), but it was slow compared with more modern CMOS families.

Moreover, even in recent logic families there are special parts which allow operation with different power supply levels, if the need arise, such as those parts with open-drain outputs.

Keep in mind that logic chips are used essentially to perform "digital processing", and this doesn't require, in principle, high power levels (ideally one would want to use no power to process information). Whenever the need arise to drive devices that require a significant amount of power from logic level outputs you can always use standard interfacing techniques. For example, you can connect the logic output to a power MOSFET in order to switch on a relay. It would be wasteful (in many ways) to create an entire logic family capable of directly driving (relatively) high power loads when in reality this is only seldom necessary (in a complex digital board the number of "gates" that actually need to drive such loads directly is usually much smaller than the overall "gate count").

  • \$\begingroup\$ The problem of the logic chips consuming excessively large power due to higher operating logic can be easily circumvented by limiting current with external resistors in series to source or drain (depending which is hi or lo) in the internals of the chip. So it scales up. \$\endgroup\$
    – Dehbop
    Commented Jun 4, 2015 at 9:48

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