To be honest, errors in documentation aren't that rare, especially with companies that make tons of large documents.
In this case, my experience is that the register description and Pin-Package drawing are correct. As you should expect. Register interactions are documented during chip design, as is pin-out, whereas those tables are an after-though during or after testing.
I have not had problems with these exact chips going by register descriptions for the PCINTs (never use those tables) and I'm sure I have used PA2 for interrupts several times now, though I have used so many Atmels, it's all a bit of a blur.
Though seeing as the number of pins that are of different PCIE group is also not consistent on further look (2 mentioned in the table, 4 implied in the register description) I do advise a test. You-never-knows strong in this one are.