I need to design high-density board with MCU, external RAM, GPS, GSM, Bluetooth, CAN, RGB interface on small size(5x10cm) and got into thinking which stackup should I use.
Currently I have almost half bigger PCB(8x15cm) on 4 layer board(SIG/GND/PWR/SIG) and everything is running well. However I am not happy about how I route PWR plane. Next HW version should meet CE/FCC requirements.
I was thinking about using this stackup(6 layers):
- Sig./Loc. ground/Pwr
- GND
- Sig
- Sig
- GND
- Sig./Loc. ground/Pwr
or this one(4 layers)
- Sig./Pwr
- Local ground/Sig.
- Full ground plane
- Sig./Local ground/Pwr
I have only 2 voltage levels(5V/4V/3V3) but I don't think I need power plane.
The problem with 6 layer stackup I think I would have is that my traces would be mainly horizontal so I cannot use vertical/horizontal routing technique while having GND layer in the middle.
Since I don't have experience with custom stackups, how much spacing between layers is required for solution 2 or solution 1? Do you suggest using this stackups? Would it be better to have full power plane for 3V3 and use 5V/4V as local PWR nets since there is only one IC per voltage?