# TTL logic level , how NOT gate checks logic level ? This is a TTL logic level checker circuit , highlighted blue area is a checker pin. Voltage at checker pin is 0.65V so this must be logic 0 , LOW LED will on.

But in input of first 7404 NOT gate in first row is 1.3V and 2nd 7404output is LOW , logic 0.

Why first NOT gate in first row thinks 1.3V is a logic 0 , (LOW)

isn't TTL voltage range in 0.8-2V is a unvilad area ?

• I can't tell exactly what logic family you're using, but HC, AHC or AC might trigger low at 1.3V. CMOS voltage levels. – scld Jun 7 '15 at 21:36
• @scld this circuit designed to detect levels and if there are unvalid levels the leds wont turn on. in range of 1.87-3.44V both leds will be off . SN74LS04N – Enkhsaruul Jun 7 '15 at 22:01
• Your concern is valid. What is not valid is your belief that this is a very good circuit. It's a simple, sort-of-good-enough logic checker. The invalid region for TTL is between 2.2 and .8 volts, so the center voltage should be at about 1.5 volts. But it's still a lousy circuit. – WhatRoughBeast Jun 7 '15 at 22:23

I assume since your circuit says it is using 7404, and not for example 74LS04 etc then it is really classic 7404 TTL.

So you are right, according to the datasheet the range for a low input is 0v to 0.8v, and a high from 2v to Vcc or 5v.

So, any input up to 0.8v is guaranteed to be a 0, and any input 2v and above is guaranteed to be a 1.

As you point out, the region in-between is a no-man's land. But that doesn't mean there is no output, it's just undefined. The input could be considered a 0 just as well as 1. But it has to be one or the other.

In your case, the gate considers the input of 1.3v to be a 0. This is not unexpected; the midway point between 0v and 2v is 1.4v, and this is slightly below that. Since this is a simulation, it is probably programmed to act that way. But in real-life, even if the input was 1.9v, it could still be considered a 0, just unlikely.

BTW your two voltmeters are not connected the same way, your top one (1.323v) shows the voltage going into the top 7404, but your bottom voltmeter (0.652v) shows the voltage at the junction of the two diodes, so the voltage is a diode drop above the voltage going into the input to the bottom 7404.

That circuit just doesn't work.

For instance, if the voltage divider R2 D1 D2 D4 is set up properly there'll be 0.8 volts at the junction of D2 and R4, but I don't think it's possible to set it up properly.

Then, if U1C is connected as shown, and there's 0.8 volts on its input, its output will go high, and LED1 will not light.

The same problem exists, in reverse, for the "high" sensor, with the sensing level set to Vih, which is 2 volts.

The schematic below shows one way to fix the problem.

Vcc is 5 volts and is common on both circuits, as is GND.

The voltage divider sets the inputs to the unity-gain buffers at 2.0 volts and 0.8 volts, the buffers being used to prevent loading on the divider by the circuit on the right.

When its input is connected to "HI", the HI LED lights while the LO LED doesn't, and when its input is connected to "LO" the LO LED will light and the HI LED will not. • Doesn't actually answer the OP's two questions; "Why first NOT gate in first row thinks 1.3V is a logic 0 , (LOW)" and "isn't TTL voltage range in 0.8-2V is a unvilad area ?" – tcrosley Jun 8 '15 at 3:07
• @tcrosley: True enough, but you did, so he got his answer. I chose to take a different tack and propose a go-no go circuit where the DUT input limits would be tested, i.e. the HI LED wouldn't light if Vih was >2 volts, and the LO LED wouldn't light if Vil was <0.8 volts. In retrospect, it would have been better to have a green LED signal PASS and a red LED signal FAIL for both Vih and Vil, so I'll play with that and edit my answer with a clean schematic sometime today, if I can get to it. – EM Fields Jun 8 '15 at 10:10