I need to determine if there will be high speed effects on the clock signal. I have not done such a simulation before.

I have the IBIS models of the circuit components involved. I think I still need to have PCB track information which will tell me the length of the tracks and perhaps the dielectric constant and I must make sure that the ground plane is continuous under the clock signal.

I have cadence design suite containing allegro design entry cis and allegro design entry hdl with AMS simulator.

I first converted the IBIS models to PSpice since I don't think that IBIS models can be simulated directly in the software tools I have. Now I do not know what to do next.

I realized that while the IBIS model clearly shows many pins of a device, its conversion into PSpice model contains only 1 or 3 pins. If its 1 it will be input, if it is 3 it will be input, output and enable. WHY!?

I have an IBIS model of the clock oscillator. Its conversion into PSpice gave me a single block with a single signal, named input. Actually the customer service person at Cadence did the conversion for me and I checked it myself later by doing it myself once I understood how to use the tool. How can the oscillator PSpice model (generated from its IBIS model) have just 1 signal and that also input, it must be an output right?

So I do not understand why the PSpice models do not have similar interface to the IBIS, I do not understand how to enter the PCB track information into the spice simulator. Do you have any advice?

  • \$\begingroup\$ Why don't use LTSpice to simulate transmission line? electronics.stackexchange.com/questions/38718/… \$\endgroup\$ – Bip Jun 7 '15 at 22:05
  • \$\begingroup\$ Please add information how you converted the IBIS model. \$\endgroup\$ – corecode Jun 9 '15 at 17:37
  • \$\begingroup\$ I opened the Allegro Design Entry CIS, then went to New>Create PSpice library, then in the new window there is option to translate IBIS models. \$\endgroup\$ – quantum231 Jun 9 '15 at 23:06
  • \$\begingroup\$ You will need to simulate/model or measure your channel, ie - the pcb trace. I don't think you can do that with Pspice. Perhaps qucs (open source circuit simulator) will be able to model the transmission lines and simulate with ibis models. \$\endgroup\$ – Mike Jan 18 '17 at 6:46

In signal Integrity analysis, power-aware IBIS 5.0 model of controller IC and memory are used for transient simulation. IBIS(Input/output Buffer Information Specification) models are a behavioral model using I-V and V-t look-up tables that make simulations extremely fast.

More details: https://anilkrpandey.wordpress.com/2016/10/16/power-aware-signal-integrity-analysis-of-ddr4-data-bus-in-onboard-memory-module/


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