How to carry out signal integrity simulation with IBIS models

Question

I need to determine if there will be high speed effects on the clock signal. I have not done such a simulation before.

I have the IBIS models of the circuit components involved. I think I still need to have PCB track information which will tell me the length of the tracks and perhaps the dielectric constant and I must make sure that the ground plane is continuous under the clock signal.

I have cadence design suite containing allegro design entry cis and allegro design entry hdl with AMS simulator.

I first converted the IBIS models to PSpice since I don't think that IBIS models can be simulated directly in the software tools I have. Now I do not know what to do next.

I realized that while the IBIS model clearly shows many pins of a device, its conversion into PSpice model contains only 1 or 3 pins. If its 1 it will be input, if it is 3 it will be input, output and enable. WHY!?

I have an IBIS model of the clock oscillator. Its conversion into PSpice gave me a single block with a single signal, named input. Actually the customer service person at Cadence did the conversion for me and I checked it myself later by doing it myself once I understood how to use the tool. How can the oscillator PSpice model (generated from its IBIS model) have just 1 signal and that also input, it must be an output right?

So I do not understand why the PSpice models do not have similar interface to the IBIS, I do not understand how to enter the PCB track information into the spice simulator. Do you have any advice?

Answer 1

I recommend performing an IBIS simulation in PSpice in four steps:

Step 1. Review the IBIS models. Some models are well defined, others not so much. It's important to actually understand the limitations of the models before using them

Step 2. Convert IBIS models to PSpice. You will need an '.lib' and '.OLB' to perform the simulation. The commercial version of PSpice has a converter but its models can be confusing to use and it's not available on the free PSpice for TI. I recommend using my free IBIS to PSpice converter tool because the models are easier to use. Improvements include:

• Driver models have a weak pull up resistor to the ENABLE pin so the I/O driver model is enabled by default (no external circuit required). This pin can be pulled low to force the output into a high impedance state.
• ENABLE pins are always assumed to be active-high.
• Input models give a probe point at the die (where we actually care) and not just the pin.

Step 3. Setup PSpice Project You need to link the library files to the simulation, and call out the models in the symbols. I recommend using relative 'INCLUDE' statements so you can zip the simulation and easily share the project with others. The built in library linker in PSpice almost always gives broken library links when you try to share.

Step 4. PSpice Schematic Creation and Simulation The first three steps need to be followed for both the driver and the receiver. After that point, add a transmission line and any matching impedances between the driver and receiver. A complete schematic and simulation example are shown below.

For an even more detailed description (8 pages!) of the steps outlines above check out my article How to Use IBIS Models in PSpice.