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We usually have digital & analog power/voltage pins on our ICs. Analog power most probably for PLLs etc & Digital Power for Core. So, my questions are :-

  1. The different Analog & Digital power pins are just to avoid noise from one to another?
  2. We can generate a Voltage from DC-DC converter & provide to wither Digital or Analog Voltage Pin?
  3. Is there any difference in Analog and Digital Voltage supplies practically?
  4. Can I provide same Voltage source to Analog as well as Digital Pin (Assuming I need 1.8V Digital & 1.8V Analog)
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  • \$\begingroup\$ Define "analog power" and "digital input". \$\endgroup\$ Jun 9, 2015 at 6:07
  • \$\begingroup\$ ... define "it work" too. \$\endgroup\$ Jun 9, 2015 at 17:03

3 Answers 3

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Assuming you mean that you have an analog voltage at the input to a digital gate, then (as already noted) it will sense a 'low' from Vss (usually ground) up to some threshold and a 'high' between some other voltage and Vdd (some positive voltage for most families of logic). Between these voltages the input is indeterminate; i.e. what the input is sensing cannot be guaranteed. The actual threshold is somewhere between the stated guaranteed levels, and varies significantly across batches and temperature.

The issue does not end here, however: if you are feeding a slow input (slower than perhaps 20 nsec / volt) to a CMOS gate, the part will experience significant class A conduction (i.e. both the input stage transistors are on at the same time) and could burn the part out. This has happened to many a person, some of them quite experienced.

When I have a slow signal that needs to enter the logic domain, I use a Schmitt trigger device.

Do a quick search on the implications of slowly changing inputs on CMOS logic.

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I'll assume by "analog power" you actually mean just a analog voltage.

Analog voltages can vary anywhere over a range, 0 to some maximum, as compared to digital signals, which nominally use two voltage levels: a low voltage (near 0v) for a logic 0, and a high voltage (near the supply voltage) for a logic 1.

I'm going to assume you analog voltage doesn't go negative, if it does go below more than about -0.3v, it would damage the digital gate.

Digital logic, or digital pins on a microcontroller, are designed to work from 0 to some voltage V\$_{DD}\$ which is used to power the gate or microcontroller; typically 3.3v or 5v.

Again, if your analog voltage goes much above the V\$_{DD}\$ voltage, say V\$_{DD}\$ + 0.3v, that is not a good thing. So I will assume the analog voltage is in the range 0 to V\$_{DD}\$. If you stay within that range, you cannot hurt the digital input by applying an analog voltage.

Digital signals are either 0 or 1. Nominally, that means 0v means 0 and V\$_{DD}\$ volts means 1. However there actually is a wide margin built into digital inputs, such that (for example) 0 up to 0.8v is considered a 0, and anything from 2v to V\$_{DD}\$ is considered a 1 (these values are typical for a V\$_{DD}\$ of 5v).

What about in the range 0.8v to 2v? That's undetermined. It may be represented as a 0 or 1.

So as an analog voltage is slowly ramped up from 0v to V\$_{DD}\$ volts (not too slowly, see Peter Smith's answer), first the gate will register a 0, and then some point above 0.8v but below 2v it will switch to a 1.

There is inherently nothing different between an analog and digital voltage, its more how they're used. Also, analog voltages don't have to be time varying, but often are (e.g. an audio signal from a microphone).

Analog signals are usually interfaced to microcontrollers using an ADC (analog to digital converter), and a DAC (digital to analog converter). Each of them can work with an analog signal (ADC for input, DAC for output) from 0 to some analog reference voltage (typically V\$_{DD}\$, but it can usually be set to a different value).

An example of a non-time varying analog signal, if one wanted to monitor a supply rail in a system, they would connect it to an ADC. I once worked on a project where there were 12 different voltages on one board, and we monitored them all. Those voltages are not going to be varying (one hopes), yet they are all considered analog -- even if one happesn to be the same voltage as the digital signals in the syetem..

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  • \$\begingroup\$ so, an analog signal will always be time varying like o to VDD but will the case be same with analog power also. Lets suppose I want to give 3.3V digital voltage to some IC, that means a DC 3.3V level. Now, If some IC needs 3.3V analog voltage, what does that mean?? \$\endgroup\$
    – Oshi
    Jun 9, 2015 at 9:21
  • \$\begingroup\$ @Rishi See the two paragraphs I added to the end of my answer. \$\endgroup\$
    – tcrosley
    Jun 9, 2015 at 10:46
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Yes, this is mostly about avoiding noise.

If you view the supply network as one resistor, and the IC being powered as another, you get a voltage divider, with the voltage on the IC's supply pin being dependent on the ratio of the two resistors. During operation, the internal resistance of the IC changes, so the voltage changes as well.

If you have a topology where a power trace (with internal resistance) from the (ideal) source first goes to one IC, then to another, it is immediately clear that the second IC will see a variable voltage on the supply pin, depending on what the first IC is doing.

If both ICs have digital logic, this does not matter, because a logic high can be 5.05V or 4.95V, and the only effect you can see from a smaller supply voltage is a slightly reduced switching speed for the following transistors, and as long as the design has an appropriate safety margin the result of the logical operations is going to be the same.

Analog parts like oscillators are however fairly sensitive to voltage differences. A VCO, as used in a PLL, will generate a different frequency when given a different voltage. The PLL control voltage is generated relative to the PLL block's supply voltage, so it will happily tolerate a large range of supply voltages, as long as they are stable.

As the digital side attempts to go for fast transitions and the analog side requires stability, a good approach is to connect them both separately to the power supply.

At this point, we're not entirely done, however, because we are still assuming an ideal supply, which we don't have.

As our components are still fairly tolerant with absolute voltages, we can ignore the DC in the network, and look at the AC only: now the ICs' supply pins generate a signal, which we'd like to stop from spreading too far. For this, we build low pass filters that match the generated spectra, typically LC filters.

Most of the time, approximating them is sufficient. In many digital designs, you'll see a 100nF capacitor across the power rails near the IC, and inductivity is provided by the trace and vias. A few larger capacitors then push the cutoff frequency lower, and these are often shared between ICs.

On the analog side, you'd try to adjust the filters to the expected frequency components and try to properly isolate each component. You most likely need fewer small capacitors because the spectrum doesn't extend as far upwards (so it is okay if your filter would pass 1 GHz and up), but you need more large ones because you cannot share the large capacitors easily anymore.

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