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Good day.

Trying to recreate a circuit, but I'm not sure what the dot BEFORE the triangle means. I know after it means invertor, does before just mean it's inverted BEFORE, instead of after? Rather confused, and not having luck searching.

Really appreciate the help.

BCD-to-7 segment latch decoder

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Just another way of drawing a logic inverter ("NOT").

The triangle-with-bubble is an inverter: logic high input yields logic low output, and vice versa. Usually the bubble is shown on the output, but in a mixed-logic system, the bubble can be shown on the input instead.

When the bubble is on the input instead of the output, that indicates that the input is an active-low input.

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  • \$\begingroup\$ Thank you. Any insight as to why it's inverted 3 times at the inputs? \$\endgroup\$ – Drazisil Jun 10 '15 at 8:54
  • \$\begingroup\$ It seems the inverters are used as a buffer for the input signal. It might be this was the easiest way to make it on the silicon. \$\endgroup\$ – David Jun 10 '15 at 9:10
  • \$\begingroup\$ Perhaps to increase the fan-out on the lower Not LE, and also used for the D inputs above to equalise transit time. \$\endgroup\$ – Chu Jun 10 '15 at 13:19
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It indicates an active-low input, active-low means you must apply 0V to make gate working.

Here you can find good explanation

The “bubble” (o) present at the end of the NOT gate symbol above denotes a signal inversion (complementation) of the output signal. But this bubble can also be present at the gates input to indicate an active-LOW input. This inversion of the input signal is not restricted to the NOT gate only but can be used on any digital circuit or gate as shown with the operation of inversion being exactly the same whether on the input or output terminal. The easiest way is to think of the bubble as simply an inverter.

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  • \$\begingroup\$ I've been on that site all night, not sure how I missed that. Thank you very much. \$\endgroup\$ – Drazisil Jun 10 '15 at 9:03

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