Can you recommend a readable and educational implementation of a CPU in VHDL or Verilog? Preferably something well documented.

P.S. I know I can look at opencores, but I'm specifically interested in stuff people have actually looked at and found interesting.

P.S.2. Sorry about the sucky tags, but as a new user I can't create new ones

You may enjoy an article series I wrote on this long ago for Circuit Cellar magazine, Building a RISC System in an FPGA.

Happy hacking!

  • 2
    See also my Design Con paper, Designing a Simple FPGA-Optimized RISC CPU and System-on-a-Chip [], which presents the annotated Verilog source code for an FPGA CPU and SoC. – Jan Gray Nov 15 '10 at 23:33
  • thats a dead link :/ – Earlz Apr 10 '12 at 4:10
  • Delete the trailing ]? – Jan Gray Oct 23 '12 at 17:04

Get this book, I've got the first edition. A few years ago I implemented their CPU in a little Flex 10K10 FPGA on a PCB I designed, with a couple of push buttons and a single 7-segment display for entering data and displaying the results.

A lot depends on what is your purpose of studying the code? In other words, what does interesting mean to you?

If you are doing it in order to see how much complexity can go into a CPU, you may be more interested in studying the source of OpenSPARC architectures. It will take a long time to dive in but you will get an appreciation for the overall big picture view of a complex microprocessor.

Then, if it is to study specific computer microarchitecture features, you will want to look at some straightforward RISC machines like the AEMB, a small and fast multi-threaded 32-bit RISC processor (shameless plug).

Then, if what you want is to learn good coding styles and conventions, the LEON2 design is a good place to learn good VHDL coding style.

However, if your purpose in studying a processor is to learn how to design one yourself, your best bet would be to start with one of the simple 8-bit machines (there are many AVR, 8051, PIC examples on the net).

  • Shameless plug - AEMB - my own "littlest processor that could." – sybreon Sep 12 '11 at 12:13

You may try examining some Forth CPU designs. Forth is a simple programming language whose specification and implementation is defined by means of two stacks stack (one for data and one for return addresses).

Several small VHDL/Verilog processors are freely available:

Some more links can be found here:

PS. Despite Forth being a fairly old and obscure language many modern stack-based VMs (Java, fast JavaScript VMs) have similar low-level design so learning about it can be fruitful.

PicoBlaze is nice, however it is not available in vendor-independent VHDL.

Some other choices are:

  • A Picoblaze clone in Verilog (you should be able to find this easily). Not sure if it is maintained
  • Gumnut is a nice small core supported by a recent Ashenden book.
  • The tiny register machine/computer by Thacker (about 200 lines of Verilog)
  • Jan Gray's XSoC/XR16 (already mentioned here)

Also, if you are looking for a compiler for your CPU, it is most probable to get one for a 16-bit CPU. Once there was Poderico's compiler from a C-like language to Picoblaze but it has been taken off the web.

  • If you include a blank line before your list your answer will be formatted much better. – Trygve Laugstøl Nov 12 '12 at 8:15

You may have a look at the Xilinx PicoBlaze processor. It's a minimal 8-bit embedded microcontroller, and the source code should be available.

  • 1
    That's all structural VHDL though, so not great as a teaching tool – Martin Thompson Nov 16 '10 at 14:35

Too late, however I provide a small answer.

There is a course named fromNand2Tetris from University of Jerusalem, this course is also present on coursera, I built the computer they created in that course. I implemented the language in scheme to be able to see myself how the computer works in the least detail. And I succeeded, the simulator they created in Java cannot do everything I wanted to see.

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