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I'm hoping someone can either verify or clarify my understanding of interfacing an Audio D/A converter to a device that sends audio over I2S.

I have an Audio Codec chip, the VS1063A (Datasheet), that is capable of sending 16 bit I2S data to an external DAC. Unfortunately, the VS1063A is constrained to 16 bits per channel, which means the bit clock runs at 32fs. Most Audio DACs require a minimum bit clock of 48fs.

For instance, TI's PCM1748 (Datasheet) states:

BCK can be operated at 32 (16-bit, right-justified only), 48, or 64 times the sampling frequency.

I found a different Audio DAC from TI, the PCM5101A (Datasheet) which seems promising, but I want to confirm my understanding. The datasheet states that it has an "integrated High-Performance Audio PLL With BCK Reference To Generate SCK Internally." Furthermore, it says

enter image description here

So here's my question: Unlike the PCM1748, which requires a 4 wire I2S interface (the forth being SCK) with some additional circuity to play the 32fs format coming out of the VS1063A, will the PCM5101A accept the 32fs format because of its ability to generate SCK internally?

Any feedback would be appreciated.

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PCM1748 should be satisfied with the 32fs output of your VS1063A when the output sample rate is set to 48kHz.

According to the documentation, you can generate a 12.288MHz MCLK output, from which a division by 8 will get you an SCLK output of 1.536MHz when 48kHz is selected, and the LROUT output will toggle with the sample rate of 48kHz, whereas SDATA will output the actual data.

enter image description here

You wire MCLK into the SCK input of the PCM1748, SCLK output into BCK, LROUT into LRCK, and SDATA into DATA intput. Figure 21 in the data sheet of PCM1748 suggests that right-justified is the correct format setting for BCK = 32fs. Your misunderstanding might come from the fact that the pins are named a little bit differently by the two vendors.

The difference between PCM1748 & PCM510xA is that the latter can live without getting the 12.288MHz master clock - it can generate it for itself using its internal PLL.

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