# Calculating gate resistor value for enhanced active-region stability

I'm working on an electronic load design driving an n-channel MOSFET with an op-amp.

I'd like to consider adding a gate resistor (R3 in the schematic) to improve the stability.

I've searched quite a bit, but have been unable to find any hard description of just how to analyze that portion of the circuit. I understand the gate resistor forms a low-pass filter with the gate capacitance and that limits the bandwidth of the signal applied to the MOSFET, improving the phase margin and making the circuit less susceptible to oscillation.

I've also found some heuristics that the value ought to be somewhere between 10R and 1K, but I'd like to understand the design choice better.

I suspect I'm calculating a Bode plot pole for the RC filter formed by the resistor and the gate capacitance. However I'm not sure which capacitance value from the MOSFET datasheet to use (guessing Ciss = 2.4nF) and whether it's just a case of applying 1/(2πRC) to locate the pole or whether it's more complicated in this case. That works out to roughly 650kHz with a 100Ω value for R3, which makes me think maybe I'm on the right track.

Also I'd love any advice of where to reasonably locate the pole to maximize stability without negatively impacting the circuit performance. Just guessing, I would expect that bandwidth of 100kHz would be plenty, but not sure if there would be reasons to place the pole either lower or higher.