I'm working on my first board layout using Eagle (7.3.0). I've got the layout done, but when I run DRC, I get a number of Stop Mask errors:

enter image description here

These seem to be due to small rectangles on the tStop layer (layer 29). If I hide the tStop layer, the errors go away, but I don't understand them in the first place. It appears as if there are two rectangles for each capacitor pad on the tStop layer, and the smaller of the two (highlighted in the screenshot) is provoking the error.

I'm using capacitors that use the C0402 package from Eagle's builtin resistor.lbr library. I don't see those additional small rectangles when I open the C0402 package directly in the library editor. They're on a few other pads (e.g. the pad at the top of the screenshot), but only for devices from Eagle's built in library. Footprints that I created myself don't show them, nor do they cause DRC errors.

Has anyone run into this before? Is there a solution? Are they something to worry about?

For what it's worth, I'm using SeeedStudio's DRC file as I intend to possibly have them make these boards for me.


1 Answer 1


Change the font of the name to be 'Vector', not 'Proportional' - you can do this by smashing the component with the smash tool and then editing the text. Otherwise Eagle requires clearance around the text.

Alternatively, and especially in this case, you should move the C1 name label into the free space near the component so that it doesn't overlap the stop layers and importantly isn't partly covered by the IC outline otherwise readability is affected. Again this is done using the smash tool which allows the text to be moved separately from the component.

  • \$\begingroup\$ Thank you! That was indeed the problem. I wanted to move the reference designator labels around anyway, but hadn't gotten that far yet, and wasn't sure how to do it. So this kills two birds with one stone. Thanks again. \$\endgroup\$ Jun 15, 2015 at 23:15

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