The requirement for maximum +/-300nA input current means that you have to clamp the input voltage to within about +/-100mV of the supply rails (depending on temperature range). If you really need this spec (for example to ensure normal operation during input spikes) then you'll need better clamping than a few resistors and diodes can provide.
I suggest a clamping the inputs with a series resistor and diodes to ground and a shunt regulator such as TL431, then a series resistor to a CMOS buffer. The buffer will not exceed the supply voltages at its output and most can withstand several mA at the input without major malfunctions (they may draw more supply current but they won't latch up).
simulate this circuit – Schematic created using CircuitLab
A more normal requirement is +/-300mV, but that still can't be met easily by a few discrete parts.
A considerably relaxed requirement is +/-300mV or +/-100mA max with normal operation not expected during transient conditions and a reset may be required to restore normal operation. In particular, analog accuracy and functionality is often disrupted by this sort of thing.
In such a case you may be able to use a simple series resistor such as 100K (using the internal protection network on the chip). Care should be taken that the current through the resistor does not raise the supply voltage when it is positive.
Pay attention to Russell's cautions-- ignoring specs is a good way to get into serious trouble. Keeping the I/O voltages of all chips exactly within the supply rails under transient conditions is usually just about impossible though, practically speaking.
Early CMOS chips had very poor latchup immunity and a small spike below or above the supply rails would cause them to fail spectacularly. These days the giant parasitic SCR that lives within most non-military CMOS chips (SOS is an exception) has mostly been tamed and it tends to cause more subtle misbehavior unless you really whack them with a high current transient of many tens of mA. Still for space applications we have to consider such major single event upsets and recover from them.