to every one. excuse my poor english. may someone help me resolve this problem. What does RT level means? A,B,C,D,W,X,Y and Z are register of n bit. project the RT level of this function just using on adder.

Z=AW + BX + CY + DZ

update: I have tried this.

According to the problem I should use just one multiplier and one adder. I used multiplexer and decoder.


"RT level" in this context means "register transfer" level. In other words, you could think of it as the "block diagram" level of detail. You need to show the registers that store data along with the logic blocks that operate on the data passing between the registers. Keep it at a high level — for example, just show a single box marked "adder" (two inputs, one output) rather than trying to show the gate-level implementation of an adder.

In this case, if you are restricted to using just one adder, you'll also need multiplexers to steer the various inputs to it, and registers to hold the intermediate results. Can you take it from there?

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