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So this is going to be a series of questions:

Enhancement MOSFETs:

N-Channel:

So applying positive voltage and up to the gate, relative to source, lets more and more current through until it reaches saturation. 0V turns it "off", so no current.

  1. ) Now, what reason will there be to apply negative voltage to gate, relative to source?

P-Channel:

Applying negative voltage and down to the gate, relative to source, lets more and more current through until it reaches saturation. 0V turns it "off".

  1. ) What reason will there be to apply positive voltage to gate, relative to source?

The rationale of the 2 questions above is that the regions of operation are "reasonably continuous":

?? -> cut-off -> linear -> saturation

In N-Channel, if positive and up is linear and saturation and 0V is cut-off, then is negative also in cut-off or is there another region? And, vice versa for P-channel.


Depletion MOSFETs:

N-Channel:

Applying negative voltage and down, relative to source, narrows the conductive channel and lets less and less current until it pinches of and lets no current through. 0V, relative to source lets current through.

  1. ) What reason will there be to apply positive voltage to the gate, relative to source? Would it conduct more current than 0V?

P-Channel:

Does not exist in the market, but for theoretical consideration:

Applying positive voltage and up, relative to source, narrows the conductive channel and lets less and less current until it pinches of and lets no current through. 0V, relative to source lets current through.

  1. ) What reason will there be to apply negative voltage to the gate, relative to source? Would it conduct more current than 0V?

The rationale of the latter 2 questions above is that the regions of operation are "reasonably continuous":

?? -> cut-off -> linear -> saturation

In N-Channel, if 0V, positive and up is saturation and linear then is negative cut-off and is there another region? And, vice versa for P-channel.

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    \$\begingroup\$ Why do you suspect there is another region? Have you looked on the internet and seen the plethora of info on this subject? \$\endgroup\$ – Andy aka Jun 17 '15 at 7:33
  • \$\begingroup\$ No, I was simply stating the intuition as to why I have questions 1-4. So, I'm asking again, for Enhancement MOSFETs, is there any advantages/disadvantages to pulling them with the same voltage as the type of their channel? For Depletion MOSFETs, is there any advantages/disadvantages to pulling them with the opposite voltage as the type of their channel? \$\endgroup\$ – Dehbop Jun 17 '15 at 11:50
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Let me answer your question focusing on a enhancement n-channel MOSFET, or nMOSFET, since every other case can be derived from it.

First off, consider that every MOSFET is a 4 terminal device, although the discrete component you can buy on mouser or RS alway come with 3 pins.

MOSFET structure, credits to Brews Ohare (on Wikipedia)

The B terminal is called body or bulk, and it is a p doped region in a nMOSFET, n doped region in a pMOSFET. In commercial discrete transistors it is usually tied to the source, hence the 3 pins for a 4 terminal device.

Back to your question, for a nMOSFET the S and D regions are highly doped n, usually indicated with n+. The gate body voltage, Vgb, controls the channel under the oxide (the white-ish layer under the gate) between the drain and source.

Since in a 3 pin MOSFET the source is connected to the body, Vgb = Vgs and that's why everybody refers to the gate source voltage as the controlling signal.

Now, there are roughly 3 region for the channel under the the oxide:

  1. Accumulation: Vgb < 0 the channel has plenty of free holes available for conduction, but in the n-p-n series between source-channel-drain there is always a reversed biased diode, hence there is no conduction.
  2. Depletion: Vgb < Vt the channel is emptied of free carriers and it is highly resistive.
  3. Inversion: Vgb > Vt the channel has plenty of free electrons, and effectively is a n region.

1 and 2 are the cutoff region, while linear and saturation happen in 3, when the channel is inverted. As a side note, this is the reason why this device is called n channel MOSFET, because when it conducts the channel is inverted from p to n.

You can find a more in depth, but still qualitative, explanation here.

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