General rule for current flow in op amps?

I'm a first year student doing elec eng. and I'm wondering about the direction of current in an op amp (Where the current flows from to where it is going). I'm wondering this so I can use KCL to find an expression for Vout, but I usually end up getting the directions wrong.

This is an example of the type of amp I'm asked to detail about in my exams. Is there a rule about the way the current flows depending of the feed back etc?

David

• The general rule is that the current flows from the power supply pins to each other and the output. That means (approximately) none flows via the input pins. Or in the example ... any current flowing through R1 must flow through 3R1 because there's nowhere else for it to go. – Brian Drummond Jun 17 '15 at 11:05

You can reasonably assume that currents can flow from an input (Va in your diagram) and from the op-amp output (Vo in your diagram). This means you can assume current does not flow into the two op-amp inputs and these can be regarded as high impedances.

Additionally, you can assume the op-amp open-loop gain is very high and the impact of this is that for an output voltage that is reasonable (i.e. somewhere within the bounds of the power supply rails), the difference between V1 and V2 is zero volts.

All the above assumes that there is an overall negative feedback that keeps the output in the linear region i.e. within the bounds of the power rails.

If the overall feedback is zero or positive then the output will likely be end-stopped against one of the power rails and there may well be currents taken by the inputs AND, you can no-longer assume V1 = V2.

• Ah now that makes sense, however in this diagram the current flows to differently. Why's is that?i.imgur.com/cNJ2d4U.png – Dave Jun 17 '15 at 10:38
• The integrator current flow is reasonable if Vin is positive. I don't see the issue. It would be the same direction of current through "3R1" if Vin is greater than V2. – Andy aka Jun 17 '15 at 10:42
• Hmm do you mind If I reframe it?: The problem I'm having is when applying KCL. In the original post diagram, the sum of currents is given by (Va-V1)/R1 + (Vout-V1)/3R1 = 0. In the second diagram this formula is (V1-Vin)/R + (V1-Vout)/R = 0 (Lets imagine that the capacitor is a resistor). Why is it that in the first diagram it is -V1 but in the second it is +V1? What decides this and how do you determine it? Sorry for the longwinded discussion! :) – Dave Jun 17 '15 at 10:49
• Like with any analysis, if you are consistent with the direction of current flow (even if you are mistaken), the answer will be negative implying the current is reversed. I'm not about to get in the finer points of KCL other than try it out and see what I mean. – Andy aka Jun 17 '15 at 11:03
• Dave - as Andy aka has mentioned, his approach for finding the solution of the problem is based on the assumption of an IDEAL opamp. Are you sure that this allowed in your case (exam)? If not, you must apply a somewhat modified approach, – LvW Jun 17 '15 at 14:03

just for your personnal knownledge, the orther response didn't mention it but if you have a positive feedback you end-up with a non-linear circuit that actually can produce waveform like square, ramp, sinus , etc.

[edited]

From the comment, I see that I wasn't clear, I refer to positive feedback only circuit.

• Just for clarification: The circuit HAS a positive feedback path (as can be seen) - however, it also has negative feedback. The important point is that negative feedback must dominate over positive feedback (and that is the case for the shown circuit). I suppose, that is what Mathieu had in mind. – LvW Jun 17 '15 at 13:54
• In that particular, the amp-op nearly look an impedance simulator, I would need to check my ref book, but this set up allow you to build negative resistance. – MathieuL Jun 17 '15 at 14:08
• [REF-CHECKED] , no this circuit doesn't simulate negative resistance. en.wikipedia.org/wiki/Negative_impedance_converter – MathieuL Jun 17 '15 at 14:15
• Just for information: r1=V1/i1=-3R1/4. That means: The input resistance at the V1 node is NEGATIVE (without R1 the circuit resembles, indeed, a NIC). But the whole assembly is stable as long as R1>r1. – LvW Jun 17 '15 at 15:40
• Supplement: And, therefore, the input resistance at the VA node is r,in=R1-3R1/4=R1/4. – LvW Jun 17 '15 at 15:57