I have run a simulation of a Verilog code testbench. I ran it in ModelSim, but why the reading I got from just using the cursor on the waveform is different from the one in transcript window.
While in the cursor, the WDIG_OUT values is offset 1 step backwards, making the 111 wDIG_OUT to match with 2181 rANALOG_IN. (just like in the case of "a" here).
I cannot proceed to self-checking because there is an offset. Please help.