I don't have any pratical knowledge about eletronic circuit. Actually I am a high level software programer and I've just begin to learning about computer hardware and eletronics.

Basically, I understand that every device has its own internal frequecy but they use an external frequency to communicate to other devices such as the CPU vice versa through a ''bus''.

And I know the motherboard has its own clock also.

What I cannot realize is how these devices can communicate each other if they have different clock and how exactly happens this communication? What is a clock cycle and what the ''motherboard's clock'' has to do with it? What happens if i use one 1000Mhz CPU with one 1333Mhz memory?

All internet explanations vary and are not very clear. I know that when I start to study electrical engineering from the beginning all this will automatically clear, but for now, I need to have an accurate sense of how everything works.

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    \$\begingroup\$ By using synchronous protocols. \$\endgroup\$ – Ignacio Vazquez-Abrams Jun 20 '15 at 16:07

There are two different ways that chips on a motherboard communicate with each other: synchronous communication and asynchronous communication.

Synchronous communication

Most motherboards have a clock generator that controls a global clock signal that synchronizes the memory, the CPU, and a few other chips. A so-called "DDR3-1333 memory" is tested to work up to 166.7 Mhz. When it is plugged into a motherboard running at with a 100 MHz memory clock, that memory actually runs at 100 Mhz and works fine with a CPU with a 100 MHz memory clock. (That memory does not have an internal 166.7 MHz clock). If someone were to change the global clock frequency (most modern motherboards allow a person to easily change the frequency with a BIOS setting), then the memory would actually run at whatever frequency the clock generator sends to the memory chip.

It reminds me of a 130 mph automobile tires. They don't actually operate at 130 mph all the time. Something else controls the actual speed the tire moves, and the tire is designed to handle any speed requested of it, as long as that speed is no more than 130 mph.

Asynchronous communication

For a variety of reasons, many devices on a typical motherboard run at a clock rate different from the metronome-like motherboard global clock signal.

Some of those devices, such as many modern CPUs, have an internal oscillator phase-locked to oscillate at some frequency that is a fixed ratio of small integers relative to the global motherboard clock signal.

Other of those devices, like the real-time clock chip, have their own crystal oscillator completely independent of the crystal oscillator attached to the clock generator. (The ratio of their frequencies is often not a rational number, and sometimes slowly drifts).

While some researchers have built Clockless CPUs, pretty much all commercial CPUs are either completely synchronous, or globally asynchronous locally synchronous (GALS).

When two devices with different oscillators (or two different clock domains on a GALS chip) need to transfer data to each other, my understanding is that the 3 most popular techniques for clock domain crossing are:

  • The data source sends a metronome-like "bus clock" that is less than half the clock rate of clock used by the destination (either the actual clock of the data source, if it is slow enough, or some slower signal derived from the clock of the data source) that tells the destination when to grab the data on the data lines. The destination registers the "bus clock" and the data lines, and accepts the new data on the agreed-upon edge of the clock signal. The data source holds the data lines constant before and after that "clock" edge, long enough that, no matter what the relative clock rate of the source and the destination, the correct data is latched.
  • The data source uses gray code for data passing between clock domains so that no matter when the destination grabs the data (just before, during, or just after a change), the destination sees valid data.
  • The data source uses some asynchronous communication protocol that generally sets data on some wires, then sets some wire that indicates the data is ready. The data source holds those data lines constant until it receives a signal from the receiver that indicates the receiver has received that data and is ready for the next.
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Well in general for two chips to talk to each other there's some agreement for what frequency the interface will run at. For your memory case the memory interface would be running at 1333MHz, and while the CPU only runs at 1Ghz, the memory interface on that CPU chip is designed to run at 1333MHz.

From there you have two interesting problems. Imagine if the memory interface was 1GHz but the CPU was only 100MHz. Perhaps this system only needs slow access to memory so you don't use it's full potential, if you did need that memory bandwidth though you could simply bring a much wider internal bus from the CPU to it's memory controller. Say internally you move data at 256bits, but the external memory bus is only 32bits wide. Just as an example.

This then also brings up another issue of cross clock domain. If your clocks are all synchronous multiples of each other derived from one common source say the CPU oscillator this is not an issue. But if instead the clocks are running at non multiples or otherwise asynchronous from each other you can run into of cross clock domain issues. Here you must use proper techniques to ensure the data and commands move cleanly from one clock domain to the other or you could end up with missing or corrupt data or metastability problems.

Check out CDC or cross clock domain as a search term for more information on that.

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  • \$\begingroup\$ what is motherboard clock? \$\endgroup\$ – ropbla9 Jun 20 '15 at 17:13
  • \$\begingroup\$ @ropbla9 Usually on a PC motherboard there is a master oscillator circuit from which almost every other clock signal needed is derived (most commonly using digital frequency division). \$\endgroup\$ – Lorenzo Donati -- Codidact.org Jun 20 '15 at 17:46
  • \$\begingroup\$ @LorenzoDonati, so what is a clock cycle? \$\endgroup\$ – ropbla9 Jun 20 '15 at 18:23
  • \$\begingroup\$ Google: In a computer, the clock cycle is the time between two adjacent pulses of the oscillator that sets the tempo of the computer processor. \$\endgroup\$ – Some Hardware Guy Jun 20 '15 at 18:38
  • \$\begingroup\$ @ropbla9 Adding to what SomeHWGuy said. A clock signal is usually a two-level periodic signal (a square wave). One period of that signal is also known as a clock cycle. \$\endgroup\$ – Lorenzo Donati -- Codidact.org Jun 20 '15 at 19:04

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